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authorGeert Uytterhoeven <geert+renesas@glider.be>2021-12-23 15:41:38 +0100
committerGeert Uytterhoeven <geert+renesas@glider.be>2022-02-22 09:57:16 +0100
commit7cba3cbcd677a460a2ced2132ed03dcff2e2da14 (patch)
tree76e83ddb909d68331c48e153fc06871deaf7fb9f /drivers/pinctrl/renesas/pfc-r8a7791.c
parentbf5da1c0e975e9e03dd5991b6dac9865a002c17d (diff)
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pinctrl: renesas: r8a7791: Share QSPI pin group data
Pin groups qspi_data2{,_b} are subsets of qspi_data4{,_b}. This reduces kernel size by 32 bytes. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/fbfd27a143e87fdb94acec2e3fa8db9029e2c99c.1640269757.git.geert+renesas@glider.be
Diffstat (limited to 'drivers/pinctrl/renesas/pfc-r8a7791.c')
-rw-r--r--drivers/pinctrl/renesas/pfc-r8a7791.c30
1 files changed, 8 insertions, 22 deletions
diff --git a/drivers/pinctrl/renesas/pfc-r8a7791.c b/drivers/pinctrl/renesas/pfc-r8a7791.c
index 38900f07738a..30193108c680 100644
--- a/drivers/pinctrl/renesas/pfc-r8a7791.c
+++ b/drivers/pinctrl/renesas/pfc-r8a7791.c
@@ -3198,19 +3198,12 @@ static const unsigned int qspi_ctrl_pins[] = {
static const unsigned int qspi_ctrl_mux[] = {
SPCLK_MARK, SSL_MARK,
};
-static const unsigned int qspi_data2_pins[] = {
- /* MOSI_IO0, MISO_IO1 */
- RCAR_GP_PIN(1, 5), RCAR_GP_PIN(1, 6),
-};
-static const unsigned int qspi_data2_mux[] = {
- MOSI_IO0_MARK, MISO_IO1_MARK,
-};
-static const unsigned int qspi_data4_pins[] = {
+static const unsigned int qspi_data_pins[] = {
/* MOSI_IO0, MISO_IO1, IO2, IO3 */
RCAR_GP_PIN(1, 5), RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 7),
RCAR_GP_PIN(1, 8),
};
-static const unsigned int qspi_data4_mux[] = {
+static const unsigned int qspi_data_mux[] = {
MOSI_IO0_MARK, MISO_IO1_MARK, IO2_MARK, IO3_MARK,
};
@@ -3221,19 +3214,12 @@ static const unsigned int qspi_ctrl_b_pins[] = {
static const unsigned int qspi_ctrl_b_mux[] = {
SPCLK_B_MARK, SSL_B_MARK,
};
-static const unsigned int qspi_data2_b_pins[] = {
- /* MOSI_IO0, MISO_IO1 */
- RCAR_GP_PIN(6, 1), RCAR_GP_PIN(6, 2),
-};
-static const unsigned int qspi_data2_b_mux[] = {
- MOSI_IO0_B_MARK, MISO_IO1_B_MARK,
-};
-static const unsigned int qspi_data4_b_pins[] = {
+static const unsigned int qspi_data_b_pins[] = {
/* MOSI_IO0, MISO_IO1, IO2, IO3 */
RCAR_GP_PIN(6, 1), RCAR_GP_PIN(6, 2), RCAR_GP_PIN(6, 3),
RCAR_GP_PIN(6, 4),
};
-static const unsigned int qspi_data4_b_mux[] = {
+static const unsigned int qspi_data_b_mux[] = {
MOSI_IO0_B_MARK, MISO_IO1_B_MARK, IO2_B_MARK, IO3_B_MARK,
};
/* - SCIF0 ------------------------------------------------------------------ */
@@ -4648,11 +4634,11 @@ static const struct {
SH_PFC_PIN_GROUP(pwm5_b),
SH_PFC_PIN_GROUP(pwm6),
SH_PFC_PIN_GROUP(qspi_ctrl),
- SH_PFC_PIN_GROUP(qspi_data2),
- SH_PFC_PIN_GROUP(qspi_data4),
+ BUS_DATA_PIN_GROUP(qspi_data, 2),
+ BUS_DATA_PIN_GROUP(qspi_data, 4),
SH_PFC_PIN_GROUP(qspi_ctrl_b),
- SH_PFC_PIN_GROUP(qspi_data2_b),
- SH_PFC_PIN_GROUP(qspi_data4_b),
+ BUS_DATA_PIN_GROUP(qspi_data, 2, _b),
+ BUS_DATA_PIN_GROUP(qspi_data, 4, _b),
SH_PFC_PIN_GROUP(scif0_data),
SH_PFC_PIN_GROUP(scif0_data_b),
SH_PFC_PIN_GROUP(scif0_data_c),