Merge tag 'pinctrl-v5.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "This is the bulk of pin control changes for the v5.12 kernel.

  This time a calm set with no core changes.

  New drivers/subdrivers:

   - Renesas R8A7790A0 pin controller.

   - Allwinner H616 and H616-R pin controllers.

   - Qualcomm SM8350 and SC8180x pin controllers.

  Improvements:

   - Redo the DT bindings for Ralink RT2880.

   - A common Qualcomm TLMM DT binding in YAML.

   - Delete the unused drivers for U300, COH901, Sirf Atlas, and ZTE ZX"

* tag 'pinctrl-v5.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (71 commits)
  pinctrl: mediatek: Fix trigger type setting follow for unexpected interrupt
  dt-bindings: pinctrl: Group tuples in pin control properties
  pinctrl: nuvoton: npcm7xx: Fix alignment of table header comment
  pinctrl: at91-pio4: fix "Prefer 'unsigned int' to bare use of 'unsigned'"
  pinctrl: at91-pio4: add support for slew-rate
  dt-bindings: pinctrl: at91-pio4: add slew-rate
  pinctrl: actions: Add depends on || COMPILE_TEST
  pinctrl: single: set function name when adding function
  pinctrl: qcom: Add sc8180x TLMM driver
  dt-bindings: pinctrl: qcom: Add sc8180x binding
  dt-bindings: pinctrl: qcom: Define common TLMM binding
  pinctrl: qcom: Add SM8350 pinctrl driver
  dt-bindings: pinctrl: qcom: Add SM8350 pinctrl bindings
  pinctrl: samsung: use raw_spinlock for s3c64xx
  dt-bindings: mediatek: mt8192: Fix dt_binding_check warning
  pinctrl: qcom: spmi-mpp: Add PM8019 compatible
  pinctrl: pinmux: add function selector to pinmux-functions
  pinctrl: samsung: use raw_spinlock for locking
  pinctrl: clarify #pinctrl-cells for pinctrl-single,pins
  pinctrl: actions: Add the platform dependency to drivers
  ...

1 files changed, 8 insertions, 8 deletions

diff --git a/drivers/pinctrl/samsung/pinctrl-exynos.c b/drivers/pinctrl/samsung/pinctrl-exynos.c
index b9ea09fabf84..0cd7f33cdf25 100644
--- a/drivers/pinctrl/samsung/pinctrl-exynos.c
+++ b/drivers/pinctrl/samsung/pinctrl-exynos.c
@@ -58,13 +58,13 @@ static void exynos_irq_mask(struct irq_data *irqd)
 	unsigned long mask;
 	unsigned long flags;
 
-	spin_lock_irqsave(&bank->slock, flags);
+	raw_spin_lock_irqsave(&bank->slock, flags);
 
 	mask = readl(bank->eint_base + reg_mask);
 	mask |= 1 << irqd->hwirq;
 	writel(mask, bank->eint_base + reg_mask);
 
-	spin_unlock_irqrestore(&bank->slock, flags);
+	raw_spin_unlock_irqrestore(&bank->slock, flags);
 }
 
 static void exynos_irq_ack(struct irq_data *irqd)
@@ -97,13 +97,13 @@ static void exynos_irq_unmask(struct irq_data *irqd)
 	if (irqd_get_trigger_type(irqd) & IRQ_TYPE_LEVEL_MASK)
 		exynos_irq_ack(irqd);
 
-	spin_lock_irqsave(&bank->slock, flags);
+	raw_spin_lock_irqsave(&bank->slock, flags);
 
 	mask = readl(bank->eint_base + reg_mask);
 	mask &= ~(1 << irqd->hwirq);
 	writel(mask, bank->eint_base + reg_mask);
 
-	spin_unlock_irqrestore(&bank->slock, flags);
+	raw_spin_unlock_irqrestore(&bank->slock, flags);
 }
 
 static int exynos_irq_set_type(struct irq_data *irqd, unsigned int type)
@@ -169,14 +169,14 @@ static int exynos_irq_request_resources(struct irq_data *irqd)
 	shift = irqd->hwirq * bank_type->fld_width[PINCFG_TYPE_FUNC];
 	mask = (1 << bank_type->fld_width[PINCFG_TYPE_FUNC]) - 1;
 
-	spin_lock_irqsave(&bank->slock, flags);
+	raw_spin_lock_irqsave(&bank->slock, flags);
 
 	con = readl(bank->pctl_base + reg_con);
 	con &= ~(mask << shift);
 	con |= EXYNOS_PIN_FUNC_EINT << shift;
 	writel(con, bank->pctl_base + reg_con);
 
-	spin_unlock_irqrestore(&bank->slock, flags);
+	raw_spin_unlock_irqrestore(&bank->slock, flags);
 
 	return 0;
 }
@@ -192,14 +192,14 @@ static void exynos_irq_release_resources(struct irq_data *irqd)
 	shift = irqd->hwirq * bank_type->fld_width[PINCFG_TYPE_FUNC];
 	mask = (1 << bank_type->fld_width[PINCFG_TYPE_FUNC]) - 1;
 
-	spin_lock_irqsave(&bank->slock, flags);
+	raw_spin_lock_irqsave(&bank->slock, flags);
 
 	con = readl(bank->pctl_base + reg_con);
 	con &= ~(mask << shift);
 	con |= EXYNOS_PIN_FUNC_INPUT << shift;
 	writel(con, bank->pctl_base + reg_con);
 
-	spin_unlock_irqrestore(&bank->slock, flags);
+	raw_spin_unlock_irqrestore(&bank->slock, flags);
 
 	gpiochip_unlock_as_irq(&bank->gpio_chip, irqd->hwirq);
 }