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| author | Krzysztof Adamski <k@japko.eu> | 2016-02-03 08:57:14 +0100 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2016-02-11 14:29:13 +0100 |
| commit | 111f2b87326199a736c3469265763a6be6e5528f (patch) | |
| tree | c3b2e6642f3e6410c3551986152c3713ccf32a08 /drivers/pinctrl/sunxi | |
| parent | eceb3e61c74356590f37cec89708770b333162c4 (diff) | |
| download | linux-stable-111f2b87326199a736c3469265763a6be6e5528f.tar.gz linux-stable-111f2b87326199a736c3469265763a6be6e5528f.tar.bz2 linux-stable-111f2b87326199a736c3469265763a6be6e5528f.zip | |
pinctrl: sunxi: H3 requires irq_read_needs_mux
It seems that on H3, just like on A10, when GPIOs are configured as
external interrupt data registers does not contain their value. When
value is read, GPIO function must be temporary switched to input for
reads.
Signed-off-by: Krzysztof Adamski <k@japko.eu>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/sunxi')
| -rw-r--r-- | drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c index 77d4cf047cee..11760bbe9d51 100644 --- a/drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c +++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c @@ -492,6 +492,7 @@ static const struct sunxi_pinctrl_desc sun8i_h3_pinctrl_data = { .pins = sun8i_h3_pins, .npins = ARRAY_SIZE(sun8i_h3_pins), .irq_banks = 2, + .irq_read_needs_mux = true }; static int sun8i_h3_pinctrl_probe(struct platform_device *pdev) |