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| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2021-11-17 10:59:32 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2021-11-19 10:55:21 +0100 |
| commit | 7c50a407b8687ae3589c740d2347d9ae73887889 (patch) | |
| tree | 9da243b23df732d1f66aa8727c128c39e5f9f5d0 /drivers/pinctrl | |
| parent | adb613f84a9e3638dfcc85975c7d58a4e80eef02 (diff) | |
| download | linux-stable-7c50a407b8687ae3589c740d2347d9ae73887889.tar.gz linux-stable-7c50a407b8687ae3589c740d2347d9ae73887889.tar.bz2 linux-stable-7c50a407b8687ae3589c740d2347d9ae73887889.zip | |
pinctrl: renesas: Remove unneeded locking around sh_pfc_read() calls
There is no need to acquire the spinlock when reading from a pin
controller register:
1. Reading a single MMIO register is an atomic operation,
2. While sh_pfc_phys_to_virt() inside sh_pfc_read() has to traverse
all mapped windows to find the appropriate virtual address, this
does not need any locking, as the window mappings are never
changed.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/2008ca99f0079fd5d4e640b7ef78710c98cc9f77.1637143108.git.geert+renesas@glider.be
Diffstat (limited to 'drivers/pinctrl')
| -rw-r--r-- | drivers/pinctrl/renesas/pinctrl.c | 9 |
1 files changed, 1 insertions, 8 deletions
diff --git a/drivers/pinctrl/renesas/pinctrl.c b/drivers/pinctrl/renesas/pinctrl.c index f3eecb20c086..96b9de974246 100644 --- a/drivers/pinctrl/renesas/pinctrl.c +++ b/drivers/pinctrl/renesas/pinctrl.c @@ -504,7 +504,6 @@ static u32 sh_pfc_pinconf_find_drive_strength_reg(struct sh_pfc *pfc, static int sh_pfc_pinconf_get_drive_strength(struct sh_pfc *pfc, unsigned int pin) { - unsigned long flags; unsigned int offset; unsigned int size; u32 reg; @@ -514,11 +513,7 @@ static int sh_pfc_pinconf_get_drive_strength(struct sh_pfc *pfc, if (!reg) return -EINVAL; - spin_lock_irqsave(&pfc->lock, flags); - val = sh_pfc_read(pfc, reg); - spin_unlock_irqrestore(&pfc->lock, flags); - - val = (val >> offset) & GENMASK(size - 1, 0); + val = (sh_pfc_read(pfc, reg) >> offset) & GENMASK(size - 1, 0); /* Convert the value to mA based on a full drive strength value of 24mA. * We can make the full value configurable later if needed. @@ -648,9 +643,7 @@ static int sh_pfc_pinconf_get(struct pinctrl_dev *pctldev, unsigned _pin, if (WARN(bit < 0, "invalid pin %#x", _pin)) return bit; - spin_lock_irqsave(&pfc->lock, flags); val = sh_pfc_read(pfc, pocctrl); - spin_unlock_irqrestore(&pfc->lock, flags); lower_voltage = (pin->configs & SH_PFC_PIN_VOLTAGE_25_33) ? 2500 : 1800; |