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author | Tianfei Zhang <tianfei.zhang@intel.com> | 2023-03-28 10:24:55 -0400 |
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committer | Jakub Kicinski <kuba@kernel.org> | 2023-03-29 21:25:48 -0700 |
commit | 615927f1a487bd9066425df48d06cec3bb3d8dbb (patch) | |
tree | 099087fd9e9cdb50f7f6ccc811669049cc87ea56 /drivers/ptp/Kconfig | |
parent | 3b064f541be822dc095991c6dda20a75eb51db5e (diff) | |
download | linux-stable-615927f1a487bd9066425df48d06cec3bb3d8dbb.tar.gz linux-stable-615927f1a487bd9066425df48d06cec3bb3d8dbb.tar.bz2 linux-stable-615927f1a487bd9066425df48d06cec3bb3d8dbb.zip |
ptp: add ToD device driver for Intel FPGA cards
Adding a DFL (Device Feature List) device driver of ToD device for
Intel FPGA cards.
The Intel FPGA Time of Day(ToD) IP within the FPGA DFL bus is exposed
as PTP Hardware clock(PHC) device to the Linux PTP stack to synchronize
the system clock to its ToD information using phc2sys utility of the
Linux PTP stack. The DFL is a hardware List within FPGA, which defines
a linked list of feature headers within the device MMIO space to provide
an extensible way of adding subdevice features.
Signed-off-by: Raghavendra Khadatare <raghavendrax.anand.khadatare@intel.com>
Signed-off-by: Tianfei Zhang <tianfei.zhang@intel.com>
Acked-by: Richard Cochran <richardcochran@gmail.com>
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Link: https://lore.kernel.org/r/20230328142455.481146-1-tianfei.zhang@intel.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to 'drivers/ptp/Kconfig')
-rw-r--r-- | drivers/ptp/Kconfig | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/drivers/ptp/Kconfig b/drivers/ptp/Kconfig index fe4971b65c64..b00201d81313 100644 --- a/drivers/ptp/Kconfig +++ b/drivers/ptp/Kconfig @@ -186,4 +186,18 @@ config PTP_1588_CLOCK_OCP More information is available at http://www.timingcard.com/ +config PTP_DFL_TOD + tristate "FPGA DFL ToD Driver" + depends on FPGA_DFL + depends on PTP_1588_CLOCK + help + The DFL (Device Feature List) device driver for the Intel ToD + (Time-of-Day) device in FPGA card. The ToD IP within the FPGA + is exposed as PTP Hardware Clock (PHC) device to the Linux PTP + stack to synchronize the system clock to its ToD information + using phc2sys utility of the Linux PTP stack. + + To compile this driver as a module, choose M here: the module + will be called ptp_dfl_tod. + endmenu |