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authorGuillermo Rodriguez <guille.rodriguez@gmail.com>2016-05-13 13:09:37 +0200
committerThierry Reding <thierry.reding@gmail.com>2016-07-11 12:49:35 +0200
commitf718c54c1abab7171d375112bffd199046749953 (patch)
tree20ac27d690f99b21855e2f9751381c0ea688aa2c /drivers/pwm
parent396d502c5167da69096c683c4566388ba42d2623 (diff)
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pwm: atmel: Fix disabling of PWM channels
When disabling a PWM channel, the PWM clock was being stopped immediately after writing to PWM_DIS. As a result, the disabling of the PWM channel did not complete properly, and the PWM output might be left at the wrong level. Fix this by waiting for the channel to be effectively disabled (by checking the PWM_SR register) before disabling the clock. Signed-off-by: Guillermo Rodriguez <guille.rodriguez@gmail.com> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Diffstat (limited to 'drivers/pwm')
-rw-r--r--drivers/pwm/pwm-atmel.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/pwm/pwm-atmel.c b/drivers/pwm/pwm-atmel.c
index 0e4bd4e8e582..f3df529737f2 100644
--- a/drivers/pwm/pwm-atmel.c
+++ b/drivers/pwm/pwm-atmel.c
@@ -271,6 +271,16 @@ static void atmel_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
mutex_unlock(&atmel_pwm->isr_lock);
atmel_pwm_writel(atmel_pwm, PWM_DIS, 1 << pwm->hwpwm);
+ /*
+ * Wait for the PWM channel disable operation to be effective before
+ * stopping the clock.
+ */
+ timeout = jiffies + 2 * HZ;
+
+ while ((atmel_pwm_readl(atmel_pwm, PWM_SR) & (1 << pwm->hwpwm)) &&
+ time_before(jiffies, timeout))
+ usleep_range(10, 100);
+
clk_disable(atmel_pwm->clk);
}