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authorMartin K. Petersen <martin.petersen@oracle.com>2024-05-06 21:37:20 -0400
committerMartin K. Petersen <martin.petersen@oracle.com>2024-05-06 21:37:20 -0400
commit0d9a1ec632d3ce343b50d93743b24f73a2889906 (patch)
tree982a0bbd33bbc3f06c053fdad31c20dbcb7c0474 /drivers/regulator
parent998d09c5ef6183bd8137d1a892ba255b15978bb4 (diff)
parentd11e0a318df84f2542316ec8cc0fa4034240ee66 (diff)
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Merge patch series "ufs-exynos support for Tensor GS101"
Peter Griffin <peter.griffin@linaro.org> says: Hi Martin, James & Alim, This series adds support to the ufs-exynos driver for Tensor gs101 found in Pixel 6. It was send previously in [1] and [2] but included the other clock, phy and DTS parts. This series has been split into just the ufs-exynos part to hopefully make things easier. With this series, plus the phy, clock and dts changes UFS is functional upstream for Pixel 6. The SKhynix HN8T05BZGKX015 can be enumerated, partitions mounted etc. The series is split into some prepatory patches for ufs-exynos and a final patch that adds the gs101 support. Note the sysreg clock has been moved to ufs node as fine grained clock control around the syscon sysreg register accesses doesn't result in functional UFS. regards, Peter Link: https://lore.kernel.org/r/20240426122004.2249178-1-peter.griffin@linaro.org Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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