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author | AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> | 2022-03-23 10:19:32 +0100 |
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committer | Matthias Brugger <matthias.bgg@gmail.com> | 2022-04-04 14:10:02 +0200 |
commit | 9d7370a56d1871e924377872985a13f6cd104e82 (patch) | |
tree | 8aa645b6a68b7a9005855ce372ce954e5783ae2d /drivers/soc/mediatek | |
parent | 3123109284176b1532874591f7c81f3837bbdc17 (diff) | |
download | linux-stable-9d7370a56d1871e924377872985a13f6cd104e82.tar.gz linux-stable-9d7370a56d1871e924377872985a13f6cd104e82.tar.bz2 linux-stable-9d7370a56d1871e924377872985a13f6cd104e82.zip |
soc: mediatek: mmsys: Add sw0_rst_offset for MT8192
MT8192 has the same sw0 reset offset as MT8186: add the parameter
to be able to use mmsys as a reset controller for managing at
least the DSI reset line.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Link: https://lore.kernel.org/r/20220323091932.10648-1-angelogioacchino.delregno@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Diffstat (limited to 'drivers/soc/mediatek')
-rw-r--r-- | drivers/soc/mediatek/mtk-mmsys.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/soc/mediatek/mtk-mmsys.c b/drivers/soc/mediatek/mtk-mmsys.c index 4fc4c2c9ea20..893cec3c9651 100644 --- a/drivers/soc/mediatek/mtk-mmsys.c +++ b/drivers/soc/mediatek/mtk-mmsys.c @@ -70,6 +70,7 @@ static const struct mtk_mmsys_driver_data mt8192_mmsys_driver_data = { .clk_driver = "clk-mt8192-mm", .routes = mmsys_mt8192_routing_table, .num_routes = ARRAY_SIZE(mmsys_mt8192_routing_table), + .sw0_rst_offset = MT8186_MMSYS_SW0_RST_B, }; static const struct mtk_mmsys_driver_data mt8365_mmsys_driver_data = { |