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author | zhangqing <zhangqing@rock-chips.com> | 2016-01-11 02:36:39 -0800 |
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committer | Heiko Stuebner <heiko@sntech.de> | 2016-01-25 15:15:19 +0100 |
commit | 8c20b67f2873bffb37cb64b806af0aca0212dae4 (patch) | |
tree | 842409b2ff91502ba3bbbca4e919a8fcedcb7dfe /drivers/soc/rockchip | |
parent | 8df59b7d361b707ac683e9a95f1fc261a2b2cbe7 (diff) | |
download | linux-stable-8c20b67f2873bffb37cb64b806af0aca0212dae4.tar.gz linux-stable-8c20b67f2873bffb37cb64b806af0aca0212dae4.tar.bz2 linux-stable-8c20b67f2873bffb37cb64b806af0aca0212dae4.zip |
soc: rockchip: power-domain: Modify power domain driver for rk3368
This driver is modified to support RK3368 SoC.
Signed-off-by: zhangqing <zhangqing@rock-chips.com>
Reviewed-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'drivers/soc/rockchip')
-rw-r--r-- | drivers/soc/rockchip/pm_domains.c | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/drivers/soc/rockchip/pm_domains.c b/drivers/soc/rockchip/pm_domains.c index 534c58937a56..6cdffb13c862 100644 --- a/drivers/soc/rockchip/pm_domains.c +++ b/drivers/soc/rockchip/pm_domains.c @@ -18,6 +18,7 @@ #include <linux/regmap.h> #include <linux/mfd/syscon.h> #include <dt-bindings/power/rk3288-power.h> +#include <dt-bindings/power/rk3368-power.h> struct rockchip_domain_info { int pwr_mask; @@ -75,6 +76,9 @@ struct rockchip_pmu { #define DOMAIN_RK3288(pwr, status, req) \ DOMAIN(pwr, status, req, req, (req) + 16) +#define DOMAIN_RK3368(pwr, status, req) \ + DOMAIN(pwr, status, req, (req) + 16, req) + static bool rockchip_pmu_domain_is_idle(struct rockchip_pm_domain *pd) { struct rockchip_pmu *pmu = pd->pmu; @@ -444,6 +448,14 @@ static const struct rockchip_domain_info rk3288_pm_domains[] = { [RK3288_PD_GPU] = DOMAIN_RK3288(9, 9, 2), }; +static const struct rockchip_domain_info rk3368_pm_domains[] = { + [RK3368_PD_PERI] = DOMAIN_RK3368(13, 12, 6), + [RK3368_PD_VIO] = DOMAIN_RK3368(15, 14, 8), + [RK3368_PD_VIDEO] = DOMAIN_RK3368(14, 13, 7), + [RK3368_PD_GPU_0] = DOMAIN_RK3368(16, 15, 2), + [RK3368_PD_GPU_1] = DOMAIN_RK3368(17, 16, 2), +}; + static const struct rockchip_pmu_info rk3288_pmu = { .pwr_offset = 0x08, .status_offset = 0x0c, @@ -461,11 +473,32 @@ static const struct rockchip_pmu_info rk3288_pmu = { .domain_info = rk3288_pm_domains, }; +static const struct rockchip_pmu_info rk3368_pmu = { + .pwr_offset = 0x0c, + .status_offset = 0x10, + .req_offset = 0x3c, + .idle_offset = 0x40, + .ack_offset = 0x40, + + .core_pwrcnt_offset = 0x48, + .gpu_pwrcnt_offset = 0x50, + + .core_power_transition_time = 24, + .gpu_power_transition_time = 24, + + .num_domains = ARRAY_SIZE(rk3368_pm_domains), + .domain_info = rk3368_pm_domains, +}; + static const struct of_device_id rockchip_pm_domain_dt_match[] = { { .compatible = "rockchip,rk3288-power-controller", .data = (void *)&rk3288_pmu, }, + { + .compatible = "rockchip,rk3368-power-controller", + .data = (void *)&rk3368_pmu, + }, { /* sentinel */ }, }; |