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| author | Dmitry Osipenko <digetx@gmail.com> | 2021-12-01 02:23:35 +0300 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2021-12-16 14:03:38 +0100 |
| commit | aeecc50ace0480e6df565093e578b129902918db (patch) | |
| tree | b2c2b1af0a739deee893171595e8801b34f1a397 /drivers/soc/tegra/fuse/fuse.h | |
| parent | 765d95f8ac54af611c804bb956b79391cfc1d27b (diff) | |
| download | linux-stable-aeecc50ace0480e6df565093e578b129902918db.tar.gz linux-stable-aeecc50ace0480e6df565093e578b129902918db.tar.bz2 linux-stable-aeecc50ace0480e6df565093e578b129902918db.zip | |
soc/tegra: fuse: Reset hardware
The FUSE controller is enabled at a boot time. Reset it in order to put
hardware and clock into clean and disabled state.
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/soc/tegra/fuse/fuse.h')
| -rw-r--r-- | drivers/soc/tegra/fuse/fuse.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/soc/tegra/fuse/fuse.h b/drivers/soc/tegra/fuse/fuse.h index de58feba0435..1b719d85bd04 100644 --- a/drivers/soc/tegra/fuse/fuse.h +++ b/drivers/soc/tegra/fuse/fuse.h @@ -43,6 +43,7 @@ struct tegra_fuse { void __iomem *base; phys_addr_t phys; struct clk *clk; + struct reset_control *rst; u32 (*read_early)(struct tegra_fuse *fuse, unsigned int offset); u32 (*read)(struct tegra_fuse *fuse, unsigned int offset); |