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| author | Sevak Arakelyan <sevaka@synopsys.com> | 2018-01-19 14:39:31 +0400 |
|---|---|---|
| committer | Felipe Balbi <felipe.balbi@linux.intel.com> | 2018-03-13 10:47:40 +0200 |
| commit | 79d6b8c51cb85e27f189e0ffd0b68a0162477e47 (patch) | |
| tree | a9fcb2a062384790c3e57f530ec4d031ee194e36 /drivers/usb/dwc2/hcd.c | |
| parent | d14ccaba8dc7aa1f137ef93349b08196ce0f0347 (diff) | |
| download | linux-stable-79d6b8c51cb85e27f189e0ffd0b68a0162477e47.tar.gz linux-stable-79d6b8c51cb85e27f189e0ffd0b68a0162477e47.tar.bz2 linux-stable-79d6b8c51cb85e27f189e0ffd0b68a0162477e47.zip | |
usb: dwc2: Update bit polling functionality
Move dwc2_hsotg_wait_bit_set function to core.c so it can be used
anywhere in the code.
Added dwc2_hsotg_wait_bit_clear function in core.c.
Replace all the parts of register bit polling code with
dwc2_hsotg_wait_bit_set or dwc2_hsotg_wait_bit_clear functions
calls depends on code logic.
Acked-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Sevak Arakelyan <sevaka@synopsys.com>
Signed-off-by: Grigor Tovmasyan <tovmasya@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Diffstat (limited to 'drivers/usb/dwc2/hcd.c')
| -rw-r--r-- | drivers/usb/dwc2/hcd.c | 18 |
1 files changed, 6 insertions, 12 deletions
diff --git a/drivers/usb/dwc2/hcd.c b/drivers/usb/dwc2/hcd.c index a5d72fcd1603..516929220aa5 100644 --- a/drivers/usb/dwc2/hcd.c +++ b/drivers/usb/dwc2/hcd.c @@ -2403,24 +2403,18 @@ static void dwc2_core_host_init(struct dwc2_hsotg *hsotg) /* Halt all channels to put them into a known state */ for (i = 0; i < num_channels; i++) { - int count = 0; - hcchar = dwc2_readl(hsotg->regs + HCCHAR(i)); hcchar |= HCCHAR_CHENA | HCCHAR_CHDIS; hcchar &= ~HCCHAR_EPDIR; dwc2_writel(hcchar, hsotg->regs + HCCHAR(i)); dev_dbg(hsotg->dev, "%s: Halt channel %d\n", __func__, i); - do { - hcchar = dwc2_readl(hsotg->regs + HCCHAR(i)); - if (++count > 1000) { - dev_err(hsotg->dev, - "Unable to clear enable on channel %d\n", - i); - break; - } - udelay(1); - } while (hcchar & HCCHAR_CHENA); + + if (dwc2_hsotg_wait_bit_clear(hsotg, HCCHAR(i), + HCCHAR_CHENA, 1000)) { + dev_warn(hsotg->dev, "Unable to clear enable on channel %d\n", + i); + } } } |