summaryrefslogtreecommitdiffstats
path: root/drivers/usb/dwc3/gadget.h
diff options
context:
space:
mode:
authorThinh Nguyen <Thinh.Nguyen@synopsys.com>2024-02-09 01:24:54 +0000
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2024-02-09 10:26:08 +0000
commit7d708c145b2631941b8b0b4a740dc2990818c39c (patch)
tree25f359c592e0184fd98e8bf6f1ce46372e3fee6a /drivers/usb/dwc3/gadget.h
parentb55fe36efc22f1f1c8f69e1cdf12c9f5d6ca371e (diff)
downloadlinux-stable-7d708c145b2631941b8b0b4a740dc2990818c39c.tar.gz
linux-stable-7d708c145b2631941b8b0b4a740dc2990818c39c.tar.bz2
linux-stable-7d708c145b2631941b8b0b4a740dc2990818c39c.zip
Revert "usb: dwc3: Support EBC feature of DWC_usb31"
This reverts commit 398aa9a7e77cf23c2a6f882ddd3dcd96f21771dc. The update to the gadget API to support EBC feature is incomplete. It's missing at least the following: * New usage documentation * Gadget capability check * Condition for the user to check how many and which endpoints can be used as "fifo_mode" * Description of how it can affect completed request (e.g. dwc3 won't update TRB on completion -- ie. how it can affect request's actual length report) Let's revert this until it's ready. Fixes: 398aa9a7e77c ("usb: dwc3: Support EBC feature of DWC_usb31") Signed-off-by: Thinh Nguyen <Thinh.Nguyen@synopsys.com> Link: https://lore.kernel.org/r/3042f847ff904b4dd4e4cf66a1b9df470e63439e.1707441690.git.Thinh.Nguyen@synopsys.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/usb/dwc3/gadget.h')
-rw-r--r--drivers/usb/dwc3/gadget.h2
1 files changed, 0 insertions, 2 deletions
diff --git a/drivers/usb/dwc3/gadget.h b/drivers/usb/dwc3/gadget.h
index fd7a4e94397e..55a56cf67d73 100644
--- a/drivers/usb/dwc3/gadget.h
+++ b/drivers/usb/dwc3/gadget.h
@@ -26,8 +26,6 @@ struct dwc3;
#define DWC3_DEPCFG_XFER_NOT_READY_EN BIT(10)
#define DWC3_DEPCFG_FIFO_ERROR_EN BIT(11)
#define DWC3_DEPCFG_STREAM_EVENT_EN BIT(13)
-#define DWC3_DEPCFG_EBC_HWO_NOWB BIT(14)
-#define DWC3_DEPCFG_USE_EBC BIT(15)
#define DWC3_DEPCFG_BINTERVAL_M1(n) (((n) & 0xff) << 16)
#define DWC3_DEPCFG_STREAM_CAPABLE BIT(24)
#define DWC3_DEPCFG_EP_NUMBER(n) (((n) & 0x1f) << 25)