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authorClark Wang <xiaoning.wang@nxp.com>2021-12-27 15:45:26 +0800
committerAlexandre Belloni <alexandre.belloni@bootlin.com>2022-01-05 09:53:44 +0100
commit173fcb27210b18b38f1080f1c8f806e02cf8a53b (patch)
tree3a032e50dc7487455a048dd45a0610c1f96aa1a5 /drivers
parentd5e512574dd2eb06ace859b27cafb0de41743bb5 (diff)
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i3c: master: svc: set ODSTOP to let I2C device see the STOP signal
If using I2C/I3C mixed mode, need to set ODSTOP. Otherwise, the I2C devices cannot see the stop signal. It may cause message sending errors. Signed-off-by: Clark Wang <xiaoning.wang@nxp.com> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Jun Li <jun.li@nxp.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/20211227074529.1660398-6-xiaoning.wang@nxp.com
Diffstat (limited to 'drivers')
-rw-r--r--drivers/i3c/master/svc-i3c-master.c7
1 files changed, 5 insertions, 2 deletions
diff --git a/drivers/i3c/master/svc-i3c-master.c b/drivers/i3c/master/svc-i3c-master.c
index 74b38772d692..bc9c7fd69cbe 100644
--- a/drivers/i3c/master/svc-i3c-master.c
+++ b/drivers/i3c/master/svc-i3c-master.c
@@ -477,7 +477,7 @@ static int svc_i3c_master_bus_init(struct i3c_master_controller *m)
struct i3c_device_info info = {};
unsigned long fclk_rate, fclk_period_ns;
unsigned int high_period_ns, od_low_period_ns;
- u32 ppbaud, pplow, odhpp, odbaud, i2cbaud, reg;
+ u32 ppbaud, pplow, odhpp, odbaud, odstop, i2cbaud, reg;
int ret;
/* Timings derivation */
@@ -507,6 +507,7 @@ static int svc_i3c_master_bus_init(struct i3c_master_controller *m)
switch (bus->mode) {
case I3C_BUS_MODE_PURE:
i2cbaud = 0;
+ odstop = 0;
break;
case I3C_BUS_MODE_MIXED_FAST:
case I3C_BUS_MODE_MIXED_LIMITED:
@@ -515,6 +516,7 @@ static int svc_i3c_master_bus_init(struct i3c_master_controller *m)
* between the high and low period does not really matter.
*/
i2cbaud = DIV_ROUND_UP(1000, od_low_period_ns) - 2;
+ odstop = 1;
break;
case I3C_BUS_MODE_MIXED_SLOW:
/*
@@ -522,6 +524,7 @@ static int svc_i3c_master_bus_init(struct i3c_master_controller *m)
* constraints as the FM+ mode.
*/
i2cbaud = DIV_ROUND_UP(2500, od_low_period_ns) - 2;
+ odstop = 1;
break;
default:
return -EINVAL;
@@ -530,7 +533,7 @@ static int svc_i3c_master_bus_init(struct i3c_master_controller *m)
reg = SVC_I3C_MCONFIG_MASTER_EN |
SVC_I3C_MCONFIG_DISTO(0) |
SVC_I3C_MCONFIG_HKEEP(0) |
- SVC_I3C_MCONFIG_ODSTOP(0) |
+ SVC_I3C_MCONFIG_ODSTOP(odstop) |
SVC_I3C_MCONFIG_PPBAUD(ppbaud) |
SVC_I3C_MCONFIG_PPLOW(pplow) |
SVC_I3C_MCONFIG_ODBAUD(odbaud) |