diff options
author | Sinan Kaya <okaya@codeaurora.org> | 2018-07-19 18:04:09 -0500 |
---|---|---|
committer | Bjorn Helgaas <bhelgaas@google.com> | 2018-07-19 18:04:23 -0500 |
commit | 1842623850d09b0b1147d4974573aa305658d97f (patch) | |
tree | 24f18b1c09237b2ff8ce447abd23994a7ea53a7b /drivers | |
parent | 51259d0022f1965047bb61662f6f0d5a79a6ddb3 (diff) | |
download | linux-stable-1842623850d09b0b1147d4974573aa305658d97f.tar.gz linux-stable-1842623850d09b0b1147d4974573aa305658d97f.tar.bz2 linux-stable-1842623850d09b0b1147d4974573aa305658d97f.zip |
PCI: Handle error return from pci_reset_bridge_secondary_bus()
Commit 01fd61c0b9bd ("PCI: Add a return type for
pci_reset_bridge_secondary_bus()") added a return value to the function to
return if a device is accessible following a reset. Callers are not
checking the value.
Pass error code up high in the stack if device is not accessible.
Fixes: 01fd61c0b9bd ("PCI: Add a return type for pci_reset_bridge_secondary_bus()")
Signed-off-by: Sinan Kaya <okaya@codeaurora.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/pci/hotplug/pciehp_hpc.c | 5 | ||||
-rw-r--r-- | drivers/pci/pci.c | 12 | ||||
-rw-r--r-- | drivers/pci/pcie/aer.c | 5 | ||||
-rw-r--r-- | drivers/pci/pcie/err.c | 6 |
4 files changed, 16 insertions, 12 deletions
diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c index 718b6073afad..bbaa2114f953 100644 --- a/drivers/pci/hotplug/pciehp_hpc.c +++ b/drivers/pci/hotplug/pciehp_hpc.c @@ -728,6 +728,7 @@ int pciehp_reset_slot(struct slot *slot, int probe) struct controller *ctrl = slot->ctrl; struct pci_dev *pdev = ctrl_dev(ctrl); u16 stat_mask = 0, ctrl_mask = 0; + int rc; if (probe) return 0; @@ -745,7 +746,7 @@ int pciehp_reset_slot(struct slot *slot, int probe) if (pciehp_poll_mode) del_timer_sync(&ctrl->poll_timer); - pci_reset_bridge_secondary_bus(ctrl->pcie->port); + rc = pci_reset_bridge_secondary_bus(ctrl->pcie->port); pcie_capability_write_word(pdev, PCI_EXP_SLTSTA, stat_mask); pcie_write_cmd_nowait(ctrl, ctrl_mask, ctrl_mask); @@ -753,7 +754,7 @@ int pciehp_reset_slot(struct slot *slot, int probe) pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, ctrl_mask); if (pciehp_poll_mode) int_poll_timeout(&ctrl->poll_timer); - return 0; + return rc; } int pcie_init_notification(struct controller *ctrl) diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 97acba712e4e..98d149070205 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -4253,9 +4253,7 @@ static int pci_parent_bus_reset(struct pci_dev *dev, int probe) if (probe) return 0; - pci_reset_bridge_secondary_bus(dev->bus->self); - - return 0; + return pci_reset_bridge_secondary_bus(dev->bus->self); } static int pci_reset_hotplug_slot(struct hotplug_slot *hotplug, int probe) @@ -4850,6 +4848,8 @@ EXPORT_SYMBOL_GPL(pci_try_reset_slot); static int pci_bus_reset(struct pci_bus *bus, int probe) { + int ret; + if (!bus->self || !pci_bus_resetable(bus)) return -ENOTTY; @@ -4860,11 +4860,11 @@ static int pci_bus_reset(struct pci_bus *bus, int probe) might_sleep(); - pci_reset_bridge_secondary_bus(bus->self); + ret = pci_reset_bridge_secondary_bus(bus->self); pci_bus_unlock(bus); - return 0; + return ret; } /** @@ -4924,7 +4924,7 @@ int pci_try_reset_bus(struct pci_bus *bus) if (pci_bus_trylock(bus)) { might_sleep(); - pci_reset_bridge_secondary_bus(bus->self); + rc = pci_reset_bridge_secondary_bus(bus->self); pci_bus_unlock(bus); } else rc = -EAGAIN; diff --git a/drivers/pci/pcie/aer.c b/drivers/pci/pcie/aer.c index a2e88386af28..bde723db3d65 100644 --- a/drivers/pci/pcie/aer.c +++ b/drivers/pci/pcie/aer.c @@ -1305,6 +1305,7 @@ static pci_ers_result_t aer_root_reset(struct pci_dev *dev) { u32 reg32; int pos; + int rc; pos = dev->aer_cap; @@ -1313,7 +1314,7 @@ static pci_ers_result_t aer_root_reset(struct pci_dev *dev) reg32 &= ~ROOT_PORT_INTR_ON_MESG_MASK; pci_write_config_dword(dev, pos + PCI_ERR_ROOT_COMMAND, reg32); - pci_reset_bridge_secondary_bus(dev); + rc = pci_reset_bridge_secondary_bus(dev); pci_printk(KERN_DEBUG, dev, "Root Port link has been reset\n"); /* Clear Root Error Status */ @@ -1325,7 +1326,7 @@ static pci_ers_result_t aer_root_reset(struct pci_dev *dev) reg32 |= ROOT_PORT_INTR_ON_MESG_MASK; pci_write_config_dword(dev, pos + PCI_ERR_ROOT_COMMAND, reg32); - return PCI_ERS_RESULT_RECOVERED; + return rc ? PCI_ERS_RESULT_DISCONNECT : PCI_ERS_RESULT_RECOVERED; } /** diff --git a/drivers/pci/pcie/err.c b/drivers/pci/pcie/err.c index f7ce0cb0b0b7..03075cff86f4 100644 --- a/drivers/pci/pcie/err.c +++ b/drivers/pci/pcie/err.c @@ -175,9 +175,11 @@ out: */ static pci_ers_result_t default_reset_link(struct pci_dev *dev) { - pci_reset_bridge_secondary_bus(dev); + int rc; + + rc = pci_reset_bridge_secondary_bus(dev); pci_printk(KERN_DEBUG, dev, "downstream link has been reset\n"); - return PCI_ERS_RESULT_RECOVERED; + return rc ? PCI_ERS_RESULT_DISCONNECT : PCI_ERS_RESULT_RECOVERED; } static pci_ers_result_t reset_link(struct pci_dev *dev, u32 service) |