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author | Chee Nouk Phoon <cnphoon@altera.com> | 2015-04-24 02:32:07 -0500 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2015-04-25 14:41:52 -0400 |
commit | 20d96964b51844d4f3bea0249f62db7073c13c30 (patch) | |
tree | 56b5162551f235e0fb270cf784a39ae58571a118 /drivers | |
parent | 3051f39253680624504021fd3b29fc621a4fd6b6 (diff) | |
download | linux-stable-20d96964b51844d4f3bea0249f62db7073c13c30.tar.gz linux-stable-20d96964b51844d4f3bea0249f62db7073c13c30.tar.bz2 linux-stable-20d96964b51844d4f3bea0249f62db7073c13c30.zip |
net: eth: altera: Resolve false errors from MSGDMA to TSE
This patch resolves false errors from MSGDMA in TX mSGDMA MM to ST
mode, and is a continuation of the patch recently submitted by Andrea
Oetken. The MSGDMA had a logic bug that masked detection of this issue
prior to Quartus 14.1/Build 164. When the MSGDMA logic bug was addressed
in Quartus 14.1/Build 164, the driver problem was exposed.
The problem is corrected by making sure MSGDMA_DESC_CTL_TR_ERR_IRQ is not
set for any of the transmit DMA descriptors, and only used for receive
descriptors.
Fixes: 71cd26e altera tse: Error-Bit on tx-avalon-stream always set.
Signed-off-by: Chee Nouk Phoon <cnphoon@altera.com>
Signed-off-by: Vince Bridgers <vbridger@opensource.altera.com>a
Cc: Andreas Oetken <ennoerlangen@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/net/ethernet/altera/altera_msgdmahw.h | 5 |
1 files changed, 1 insertions, 4 deletions
diff --git a/drivers/net/ethernet/altera/altera_msgdmahw.h b/drivers/net/ethernet/altera/altera_msgdmahw.h index eba070f16782..89cd11d86642 100644 --- a/drivers/net/ethernet/altera/altera_msgdmahw.h +++ b/drivers/net/ethernet/altera/altera_msgdmahw.h @@ -58,15 +58,12 @@ struct msgdma_extended_desc { /* Tx buffer control flags */ #define MSGDMA_DESC_CTL_TX_FIRST (MSGDMA_DESC_CTL_GEN_SOP | \ - MSGDMA_DESC_CTL_TR_ERR_IRQ | \ MSGDMA_DESC_CTL_GO) -#define MSGDMA_DESC_CTL_TX_MIDDLE (MSGDMA_DESC_CTL_TR_ERR_IRQ | \ - MSGDMA_DESC_CTL_GO) +#define MSGDMA_DESC_CTL_TX_MIDDLE (MSGDMA_DESC_CTL_GO) #define MSGDMA_DESC_CTL_TX_LAST (MSGDMA_DESC_CTL_GEN_EOP | \ MSGDMA_DESC_CTL_TR_COMP_IRQ | \ - MSGDMA_DESC_CTL_TR_ERR_IRQ | \ MSGDMA_DESC_CTL_GO) #define MSGDMA_DESC_CTL_TX_SINGLE (MSGDMA_DESC_CTL_GEN_SOP | \ |