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author | Aurabindo Pillai <aurabindo.pillai@amd.com> | 2022-04-04 13:38:57 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2022-07-13 11:25:17 -0400 |
commit | 2a93292fb7860b51550d1222c151de1a9fdc15da (patch) | |
tree | 91183cb83ab919da54946a5f423a1d9abf5d04d6 /drivers | |
parent | e5028e9fd3bc7c6b916568e5218f5fca5f0d0a75 (diff) | |
download | linux-stable-2a93292fb7860b51550d1222c151de1a9fdc15da.tar.gz linux-stable-2a93292fb7860b51550d1222c151de1a9fdc15da.tar.bz2 linux-stable-2a93292fb7860b51550d1222c151de1a9fdc15da.zip |
drm/amd/display: Add NBIO reg offsets to DC
[Why&How]
Add a field to store the NBIO IP offset for use with runtime offset
calculation
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Acked-by: Solomon Chiu <solomon.chiu@amd.com>
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 1 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/core/dc.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/dc.h | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/dc_types.h | 1 |
4 files changed, 6 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c index 917bd5ad3932..d96a99d1c09e 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c @@ -1565,6 +1565,7 @@ static int amdgpu_dm_init(struct amdgpu_device *adev) init_data.flags.enable_mipi_converter_optimization = true; init_data.dcn_reg_offsets = adev->reg_offset[DCE_HWIP][0]; + init_data.nbio_reg_offsets = adev->reg_offset[NBIO_HWIP][0]; INIT_LIST_HEAD(&adev->dm.da_list); diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c index 6039b3487d4f..7453ec54420b 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc.c @@ -863,6 +863,7 @@ static bool dc_construct_ctx(struct dc *dc, dc_ctx->dc_stream_id_count = 0; dc_ctx->dce_environment = init_params->dce_environment; dc_ctx->dcn_reg_offsets = init_params->dcn_reg_offsets; + dc_ctx->nbio_reg_offsets = init_params->nbio_reg_offsets; /* Create logger */ @@ -1243,6 +1244,7 @@ struct dc *dc_create(const struct dc_init_data *init_params) } dc->dcn_reg_offsets = init_params->dcn_reg_offsets; + dc->nbio_reg_offsets = init_params->nbio_reg_offsets; /* Populate versioning information */ dc->versions.dc_ver = DC_VER; diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h index faa22580852b..89a3cc8f9274 100644 --- a/drivers/gpu/drm/amd/display/dc/dc.h +++ b/drivers/gpu/drm/amd/display/dc/dc.h @@ -810,6 +810,7 @@ struct dc { struct vm_helper *vm_helper; uint32_t *dcn_reg_offsets; + uint32_t *nbio_reg_offsets; }; enum frame_buffer_mode { @@ -857,6 +858,7 @@ struct dc_init_data { * before them. */ uint32_t *dcn_reg_offsets; + uint32_t *nbio_reg_offsets; }; struct dc_callback_init { diff --git a/drivers/gpu/drm/amd/display/dc/dc_types.h b/drivers/gpu/drm/amd/display/dc/dc_types.h index 077a93e81561..ad9041472cca 100644 --- a/drivers/gpu/drm/amd/display/dc/dc_types.h +++ b/drivers/gpu/drm/amd/display/dc/dc_types.h @@ -877,6 +877,7 @@ struct dc_context { struct cp_psp cp_psp; #endif uint32_t *dcn_reg_offsets; + uint32_t *nbio_reg_offsets; }; /* DSC DPCD capabilities */ |