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| author | Serge Semin <Sergey.Semin@baikalelectronics.ru> | 2021-11-15 21:19:16 +0300 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2021-11-16 14:30:09 +0000 |
| commit | 2b8a47e0b6984b9795baa20ddcbd37e9ea9b2a91 (patch) | |
| tree | 17c463c836086a9280abfa2b353db678e161b717 /drivers | |
| parent | 2cc8d9227bbba7d6f3790a86f1ff0d665a75f3b8 (diff) | |
| download | linux-stable-2b8a47e0b6984b9795baa20ddcbd37e9ea9b2a91.tar.gz linux-stable-2b8a47e0b6984b9795baa20ddcbd37e9ea9b2a91.tar.bz2 linux-stable-2b8a47e0b6984b9795baa20ddcbd37e9ea9b2a91.zip | |
spi: dw: Replace DWC_HSSI capability with IP-core version checker
Since there is a common IP-core and component versions interface available
we can use it to differentiate the DW HSSI device features in the code.
Let's remove the corresponding DWC_HSSI capability flag then and use the
dw_spi_ip_is() macro instead.
Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/r/20211115181917.7521-7-Sergey.Semin@baikalelectronics.ru
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/spi/spi-dw-core.c | 8 | ||||
| -rw-r--r-- | drivers/spi/spi-dw-mmio.c | 5 | ||||
| -rw-r--r-- | drivers/spi/spi-dw.h | 1 |
3 files changed, 7 insertions, 7 deletions
diff --git a/drivers/spi/spi-dw-core.c b/drivers/spi/spi-dw-core.c index 42536b448ddd..934cc7a922e8 100644 --- a/drivers/spi/spi-dw-core.c +++ b/drivers/spi/spi-dw-core.c @@ -272,7 +272,7 @@ static u32 dw_spi_prepare_cr0(struct dw_spi *dws, struct spi_device *spi) { u32 cr0 = 0; - if (!(dws->caps & DW_SPI_CAP_DWC_HSSI)) { + if (dw_spi_ip_is(dws, PSSI)) { /* CTRLR0[ 5: 4] Frame Format */ cr0 |= FIELD_PREP(DW_PSSI_CTRLR0_FRF_MASK, DW_SPI_CTRLR0_FRF_MOTO_SPI); @@ -325,7 +325,7 @@ void dw_spi_update_config(struct dw_spi *dws, struct spi_device *spi, /* CTRLR0[ 4/3: 0] or CTRLR0[ 20: 16] Data Frame Size */ cr0 |= (cfg->dfs - 1) << dws->dfs_offset; - if (!(dws->caps & DW_SPI_CAP_DWC_HSSI)) + if (dw_spi_ip_is(dws, PSSI)) /* CTRLR0[ 9:8] Transfer Mode */ cr0 |= FIELD_PREP(DW_PSSI_CTRLR0_TMOD_MASK, cfg->tmode); else @@ -832,7 +832,7 @@ static void dw_spi_hw_init(struct device *dev, struct dw_spi *dws) dws->ver = dw_readl(dws, DW_SPI_VERSION); dev_dbg(dev, "Synopsys DWC%sSSI v%c.%c%c\n", - (dws->caps & DW_SPI_CAP_DWC_HSSI) ? " " : " APB ", + dw_spi_ip_is(dws, PSSI) ? " APB " : " ", DW_SPI_GET_BYTE(dws->ver, 3), DW_SPI_GET_BYTE(dws->ver, 2), DW_SPI_GET_BYTE(dws->ver, 1)); } @@ -860,7 +860,7 @@ static void dw_spi_hw_init(struct device *dev, struct dw_spi *dws) * writability. Note DWC SSI controller also has the extended DFS, but * with zero offset. */ - if (!(dws->caps & DW_SPI_CAP_DWC_HSSI)) { + if (dw_spi_ip_is(dws, PSSI)) { u32 cr0, tmp = dw_readl(dws, DW_SPI_CTRLR0); dw_spi_enable_chip(dws, 0); diff --git a/drivers/spi/spi-dw-mmio.c b/drivers/spi/spi-dw-mmio.c index 2193c2550e74..5101c4c6017b 100644 --- a/drivers/spi/spi-dw-mmio.c +++ b/drivers/spi/spi-dw-mmio.c @@ -207,7 +207,7 @@ static int dw_spi_pssi_init(struct platform_device *pdev, static int dw_spi_hssi_init(struct platform_device *pdev, struct dw_spi_mmio *dwsmmio) { - dwsmmio->dws.caps = DW_SPI_CAP_DWC_HSSI; + dwsmmio->dws.ip = DW_HSSI_ID; dw_spi_dma_setup_generic(&dwsmmio->dws); @@ -217,7 +217,8 @@ static int dw_spi_hssi_init(struct platform_device *pdev, static int dw_spi_keembay_init(struct platform_device *pdev, struct dw_spi_mmio *dwsmmio) { - dwsmmio->dws.caps = DW_SPI_CAP_KEEMBAY_MST | DW_SPI_CAP_DWC_HSSI; + dwsmmio->dws.ip = DW_HSSI_ID; + dwsmmio->dws.caps = DW_SPI_CAP_KEEMBAY_MST; return 0; } diff --git a/drivers/spi/spi-dw.h b/drivers/spi/spi-dw.h index 2f7d77024b48..8334e6b35f89 100644 --- a/drivers/spi/spi-dw.h +++ b/drivers/spi/spi-dw.h @@ -32,7 +32,6 @@ /* DW SPI controller capabilities */ #define DW_SPI_CAP_CS_OVERRIDE BIT(0) #define DW_SPI_CAP_KEEMBAY_MST BIT(1) -#define DW_SPI_CAP_DWC_HSSI BIT(2) #define DW_SPI_CAP_DFS32 BIT(3) /* Register offsets (Generic for both DWC APB SSI and DWC SSI IP-cores) */ |