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author | Evan Quan <evan.quan@amd.com> | 2020-08-26 16:50:30 +0800 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2020-09-17 17:46:27 -0400 |
commit | 3646c00e74b26b90043353b8cc7475670a625fae (patch) | |
tree | bb71683b2411726fa2950d8f990359812cd3c739 /drivers | |
parent | 82cac71c1b646e581bd4f5c054982fcaf5b9f70f (diff) | |
download | linux-stable-3646c00e74b26b90043353b8cc7475670a625fae.tar.gz linux-stable-3646c00e74b26b90043353b8cc7475670a625fae.tar.bz2 linux-stable-3646c00e74b26b90043353b8cc7475670a625fae.zip |
drm/amd/pm: revise the umc hybrid cdr workaround
Drop the unused message(SMU_MSG_DAL_DISABLE_DUMMY_PSTATE_CHANGE).
And do not apply this workaround when the max uclk frequency
is greater than 750Mhz.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c | 61 |
1 files changed, 34 insertions, 27 deletions
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c index 6674f3abd457..79cd17d6bfaa 100644 --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c @@ -2181,18 +2181,6 @@ static int navi10_run_btc(struct smu_context *smu) return ret; } -static int navi10_dummy_pstate_control(struct smu_context *smu, bool enable) -{ - int result = 0; - - if (!enable) - result = smu_cmn_send_smc_msg(smu, SMU_MSG_DAL_DISABLE_DUMMY_PSTATE_CHANGE, NULL); - else - result = smu_cmn_send_smc_msg(smu, SMU_MSG_DAL_ENABLE_DUMMY_PSTATE_CHANGE, NULL); - - return result; -} - static inline bool navi10_need_umc_cdr_12gbps_workaround(struct amdgpu_device *adev) { if (adev->asic_type != CHIP_NAVI10) @@ -2208,32 +2196,32 @@ static inline bool navi10_need_umc_cdr_12gbps_workaround(struct amdgpu_device *a return false; } -static int navi10_disable_umc_cdr_12gbps_workaround(struct smu_context *smu) +static int navi10_umc_hybrid_cdr_workaround(struct smu_context *smu) { uint32_t uclk_count, uclk_min, uclk_max; - uint32_t smu_version; int ret = 0; - if (!navi10_need_umc_cdr_12gbps_workaround(smu->adev)) - return 0; - - ret = smu_cmn_get_smc_version(smu, NULL, &smu_version); - if (ret) - return ret; - - /* This workaround is available only for 42.50 or later SMC firmwares */ - if (smu_version < 0x2A3200) + /* This workaround can be applied only with uclk dpm enabled */ + if (!smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_UCLK_BIT)) return 0; ret = smu_v11_0_get_dpm_level_count(smu, SMU_UCLK, &uclk_count); if (ret) return ret; - ret = smu_v11_0_get_dpm_freq_by_index(smu, SMU_UCLK, (uint16_t)0, &uclk_min); + ret = smu_v11_0_get_dpm_freq_by_index(smu, SMU_UCLK, (uint16_t)(uclk_count - 1), &uclk_max); if (ret) return ret; - ret = smu_v11_0_get_dpm_freq_by_index(smu, SMU_UCLK, (uint16_t)(uclk_count - 1), &uclk_max); + /* + * The NAVI10_UMC_HYBRID_CDR_WORKAROUND_UCLK_THRESHOLD is 750Mhz. + * This workaround is needed only when the max uclk frequency + * not greater than that. + */ + if (uclk_max > 0x2EE) + return 0; + + ret = smu_v11_0_get_dpm_freq_by_index(smu, SMU_UCLK, (uint16_t)0, &uclk_min); if (ret) return ret; @@ -2250,8 +2238,27 @@ static int navi10_disable_umc_cdr_12gbps_workaround(struct smu_context *smu) /* * In this case, SMU already disabled dummy pstate during enablement * of UCLK DPM, we have to re-enabled it. - * */ - return navi10_dummy_pstate_control(smu, true); + */ + return smu_cmn_send_smc_msg(smu, SMU_MSG_DAL_ENABLE_DUMMY_PSTATE_CHANGE, NULL); +} + +static int navi10_disable_umc_cdr_12gbps_workaround(struct smu_context *smu) +{ + uint32_t smu_version; + int ret = 0; + + if (!navi10_need_umc_cdr_12gbps_workaround(smu->adev)) + return 0; + + ret = smu_cmn_get_smc_version(smu, NULL, &smu_version); + if (ret) + return ret; + + /* This workaround is available only for 42.50 or later SMC firmwares */ + if (smu_version < 0x2A3200) + return 0; + + return navi10_umc_hybrid_cdr_workaround(smu); } static void navi10_fill_i2c_req(SwI2cRequest_t *req, bool write, |