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author | Michael Strauss <michael.strauss@amd.com> | 2021-09-01 13:49:37 -0400 |
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committer | Alex Deucher <alexander.deucher@amd.com> | 2021-09-14 15:57:11 -0400 |
commit | 3da35006fef89d15d101622445d7f4760953a5f1 (patch) | |
tree | 7a9c5c1a9a2542c80a8379a322d468a7f13b49cf /drivers | |
parent | 0c55b63ba3a76673ee21bc1b82c4a33f091ff908 (diff) | |
download | linux-stable-3da35006fef89d15d101622445d7f4760953a5f1.tar.gz linux-stable-3da35006fef89d15d101622445d7f4760953a5f1.tar.bz2 linux-stable-3da35006fef89d15d101622445d7f4760953a5f1.zip |
drm/amd/display: Enable mem low power control for DCN3.1 sub-IP blocks
[WHY]
Sequences to handle powering down these sub-IP blocks are now ready for use
Reviewed-by: Eric Yang <eric.yang2@amd.com>
Acked-by: Mikita Lipski <mikita.lipski@amd.com>
Signed-off-by: Michael Strauss <michael.strauss@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c index cf6392eadaf2..613d34bde7dd 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c @@ -1009,15 +1009,15 @@ static const struct dc_debug_options debug_defaults_drv = { .use_max_lb = true, .enable_mem_low_power = { .bits = { - .vga = false, - .i2c = false, + .vga = true, + .i2c = true, .dmcu = false, // This is previously known to cause hang on S3 cycles if enabled - .dscl = false, - .cm = false, - .mpc = false, - .optc = false, - .vpg = false, - .afmt = false, + .dscl = true, + .cm = true, + .mpc = true, + .optc = true, + .vpg = true, + .afmt = true, } }, .optimize_edp_link_rate = true, |