summaryrefslogtreecommitdiffstats
path: root/drivers
diff options
context:
space:
mode:
authorDave Airlie <airlied@redhat.com>2017-02-23 12:10:42 +1000
committerDave Airlie <airlied@redhat.com>2017-02-23 12:10:42 +1000
commit43f86c9470b8a4c2c26ae678843465aac3831145 (patch)
tree6737fdb70dd6d7c27d80a18d37533749d9c178fb /drivers
parent94000cc32988a0674923309d35ab9c2405c4b39b (diff)
parent0e47b0275bdb40a9dab7a86535b1fcd85d874007 (diff)
downloadlinux-stable-43f86c9470b8a4c2c26ae678843465aac3831145.tar.gz
linux-stable-43f86c9470b8a4c2c26ae678843465aac3831145.tar.bz2
linux-stable-43f86c9470b8a4c2c26ae678843465aac3831145.zip
Merge tag 'imx-drm-fixes-2017-02-17' of https://git.pengutronix.de/git/pza/linux into drm-next
imx-drm: TVE regulator, fb size limit, and ipu-v3 module fixes - Fix i.MX5 TV encoder probing in case no dac-supply regulator is set in the device tree. - Remove 64 pixel min_width/height limit, which unnecessarily prohibits creation of small frame buffers. - Add missing ipu_csi_set_downsize export, for media drivers built as modules. - Stop modifying pdev->dev.of_node for IPU client devices that do not have an OF modalias to fix module autoloading. * tag 'imx-drm-fixes-2017-02-17' of https://git.pengutronix.de/git/pza/linux: gpu: ipu-v3: Stop overwriting pdev->dev.of_node of child devices gpu: ipu-v3: export ipu_csi_set_downsize drm/imx: lift 64x64 pixel minimum framebuffer size requirement drm/imx: imx-tve: Do not set the regulator voltage
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/imx/imx-drm-core.c4
-rw-r--r--drivers/gpu/drm/imx/imx-tve.c7
-rw-r--r--drivers/gpu/ipu-v3/ipu-common.c6
-rw-r--r--drivers/gpu/ipu-v3/ipu-csi.c1
4 files changed, 7 insertions, 11 deletions
diff --git a/drivers/gpu/drm/imx/imx-drm-core.c b/drivers/gpu/drm/imx/imx-drm-core.c
index 5ae48836652e..f562cb7964b0 100644
--- a/drivers/gpu/drm/imx/imx-drm-core.c
+++ b/drivers/gpu/drm/imx/imx-drm-core.c
@@ -357,8 +357,8 @@ static int imx_drm_bind(struct device *dev)
* this value would be used to check framebuffer size limitation
* at drm_mode_addfb().
*/
- drm->mode_config.min_width = 64;
- drm->mode_config.min_height = 64;
+ drm->mode_config.min_width = 1;
+ drm->mode_config.min_height = 1;
drm->mode_config.max_width = 4096;
drm->mode_config.max_height = 4096;
drm->mode_config.funcs = &imx_drm_mode_config_funcs;
diff --git a/drivers/gpu/drm/imx/imx-tve.c b/drivers/gpu/drm/imx/imx-tve.c
index 8f8aa4a63122..4826bb781723 100644
--- a/drivers/gpu/drm/imx/imx-tve.c
+++ b/drivers/gpu/drm/imx/imx-tve.c
@@ -98,6 +98,8 @@
/* TVE_TST_MODE_REG */
#define TVE_TVDAC_TEST_MODE_MASK (0x7 << 0)
+#define IMX_TVE_DAC_VOLTAGE 2750000
+
enum {
TVE_MODE_TVOUT,
TVE_MODE_VGA,
@@ -616,9 +618,8 @@ static int imx_tve_bind(struct device *dev, struct device *master, void *data)
tve->dac_reg = devm_regulator_get(dev, "dac");
if (!IS_ERR(tve->dac_reg)) {
- ret = regulator_set_voltage(tve->dac_reg, 2750000, 2750000);
- if (ret)
- return ret;
+ if (regulator_get_voltage(tve->dac_reg) != IMX_TVE_DAC_VOLTAGE)
+ dev_warn(dev, "dac voltage is not %d uV\n", IMX_TVE_DAC_VOLTAGE);
ret = regulator_enable(tve->dac_reg);
if (ret)
return ret;
diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c
index 97218af4fe75..8368e6f766ee 100644
--- a/drivers/gpu/ipu-v3/ipu-common.c
+++ b/drivers/gpu/ipu-v3/ipu-common.c
@@ -1238,12 +1238,6 @@ static int ipu_add_client_devices(struct ipu_soc *ipu, unsigned long ipu_base)
platform_device_put(pdev);
goto err_register;
}
-
- /*
- * Set of_node only after calling platform_device_add. Otherwise
- * the platform:imx-ipuv3-crtc modalias won't be used.
- */
- pdev->dev.of_node = of_node;
}
return 0;
diff --git a/drivers/gpu/ipu-v3/ipu-csi.c b/drivers/gpu/ipu-v3/ipu-csi.c
index 63c7292f427a..24e12b87a0cb 100644
--- a/drivers/gpu/ipu-v3/ipu-csi.c
+++ b/drivers/gpu/ipu-v3/ipu-csi.c
@@ -544,6 +544,7 @@ void ipu_csi_set_downsize(struct ipu_csi *csi, bool horiz, bool vert)
spin_unlock_irqrestore(&csi->lock, flags);
}
+EXPORT_SYMBOL_GPL(ipu_csi_set_downsize);
void ipu_csi_set_test_generator(struct ipu_csi *csi, bool active,
u32 r_value, u32 g_value, u32 b_value,