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authorPankaj Dev <pankaj.dev@st.com>2015-07-07 09:40:50 +0200
committerStephen Boyd <sboyd@codeaurora.org>2015-07-07 16:05:08 -0700
commit56551da9255f20ffd3a9711728a1a3ad4b7100af (patch)
treefb5ca1d7286bb74a5789f273fbc7ee23895e47d8 /drivers
parent7b2a4635b84b4dbb07c93201a8c0aea82ed65e4f (diff)
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drivers: clk: st: Incorrect register offset used for lock_status
Incorrect register offset used for sthi407 clockgenC Signed-off-by: Pankaj Dev <pankaj.dev@st.com> Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org> Fixes: 51306d56ba81 ("clk: st: STiH407: Support for clockgenC0") Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/clk/st/clkgen-fsyn.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/st/clkgen-fsyn.c b/drivers/clk/st/clkgen-fsyn.c
index 99c98c15d4a4..d9eb2e1d8471 100644
--- a/drivers/clk/st/clkgen-fsyn.c
+++ b/drivers/clk/st/clkgen-fsyn.c
@@ -340,7 +340,7 @@ static const struct clkgen_quadfs_data st_fs660c32_C_407 = {
CLKGEN_FIELD(0x30c, 0xf, 20),
CLKGEN_FIELD(0x310, 0xf, 20) },
.lockstatus_present = true,
- .lock_status = CLKGEN_FIELD(0x2A0, 0x1, 24),
+ .lock_status = CLKGEN_FIELD(0x2f0, 0x1, 24),
.powerup_polarity = 1,
.standby_polarity = 1,
.pll_ops = &st_quadfs_pll_c32_ops,