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author | Linus Torvalds <torvalds@linux-foundation.org> | 2020-01-05 11:15:31 -0800 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2020-01-05 11:15:31 -0800 |
commit | 768fc661d12559b0dbd99d941b3bf28fe92fd365 (patch) | |
tree | 2cfc324edc1225ddaeb2a57d1a7bd17ec3712b19 /drivers | |
parent | 36487907f34131c7e3df5b1e6b30b4e3dfcdc0af (diff) | |
parent | 0e194d9da198936fe4fb4c1e031de0f7791c09b8 (diff) | |
download | linux-stable-768fc661d12559b0dbd99d941b3bf28fe92fd365.tar.gz linux-stable-768fc661d12559b0dbd99d941b3bf28fe92fd365.tar.bz2 linux-stable-768fc661d12559b0dbd99d941b3bf28fe92fd365.zip |
Merge tag 'riscv/for-v5.5-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux
Pull RISC-V fixes from Paul Walmsley:
"Several fixes for RISC-V:
- Fix function graph trace support
- Prefix the CSR IRQ_* macro names with "RV_", to avoid collisions
with macros elsewhere in the Linux kernel tree named "IRQ_TIMER"
- Use __pa_symbol() when computing the physical address of a kernel
symbol, rather than __pa()
- Mark the RISC-V port as supporting GCOV
One DT addition:
- Describe the L2 cache controller in the FU540 DT file
One documentation update:
- Add patch acceptance guideline documentation"
* tag 'riscv/for-v5.5-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
Documentation: riscv: add patch acceptance guidelines
riscv: prefix IRQ_ macro names with an RV_ namespace
clocksource: riscv: add notrace to riscv_sched_clock
riscv: ftrace: correct the condition logic in function graph tracer
riscv: dts: Add DT support for SiFive L2 cache controller
riscv: gcov: enable gcov for RISC-V
riscv: mm: use __pa_symbol for kernel symbols
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/clocksource/timer-riscv.c | 2 | ||||
-rw-r--r-- | drivers/irqchip/irq-sifive-plic.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/timer-riscv.c index 4e54856ce2a5..c4f15c4068c0 100644 --- a/drivers/clocksource/timer-riscv.c +++ b/drivers/clocksource/timer-riscv.c @@ -56,7 +56,7 @@ static unsigned long long riscv_clocksource_rdtime(struct clocksource *cs) return get_cycles64(); } -static u64 riscv_sched_clock(void) +static u64 notrace riscv_sched_clock(void) { return get_cycles64(); } diff --git a/drivers/irqchip/irq-sifive-plic.c b/drivers/irqchip/irq-sifive-plic.c index 8df547d2d935..0aca5807a119 100644 --- a/drivers/irqchip/irq-sifive-plic.c +++ b/drivers/irqchip/irq-sifive-plic.c @@ -256,7 +256,7 @@ static int __init plic_init(struct device_node *node, * Skip contexts other than external interrupts for our * privilege level. */ - if (parent.args[0] != IRQ_EXT) + if (parent.args[0] != RV_IRQ_EXT) continue; hartid = plic_find_hart_id(parent.np); |