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| author | Eric Bernstein <eric.bernstein@amd.com> | 2018-07-30 17:43:23 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2022-07-05 16:16:43 -0400 |
| commit | c1127df9515ca781940927deffc5ae657ed73a5f (patch) | |
| tree | c5f49c697dcab6459505a2a1eaaf09de987b9aea /drivers | |
| parent | 8bc3812d0b33c214c365fff5dfb65397ad6aaf19 (diff) | |
| download | linux-stable-c1127df9515ca781940927deffc5ae657ed73a5f.tar.gz linux-stable-c1127df9515ca781940927deffc5ae657ed73a5f.tar.bz2 linux-stable-c1127df9515ca781940927deffc5ae657ed73a5f.zip | |
drm/amd/display: Fix null timing generator resource
[Why]
For some customer blending transition cases, the
available pipe for second stream is a pipe index that is
greater than the number of timing generators, which
can cause a problem in acquire_first_free_pipe since it
assumes same index for pipe and timing generator
[How]
Added logic to use last timing generator index
if the pipe index is greater than number of timing generators.
Acked-by: Alan Liu <HaoPing.Liu@amd.com>
Signed-off-by: Eric Bernstein <eric.bernstein@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c index 3d45f6cae1f7..f7b47bf3ee59 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c @@ -1885,6 +1885,12 @@ static int acquire_first_free_pipe( pipe_ctx->plane_res.mpcc_inst = pool->dpps[i]->inst; pipe_ctx->pipe_idx = i; + if (i >= pool->timing_generator_count) { + int tg_inst = pool->timing_generator_count - 1; + + pipe_ctx->stream_res.tg = pool->timing_generators[tg_inst]; + pipe_ctx->stream_res.opp = pool->opps[tg_inst]; + } pipe_ctx->stream = stream; return i; |