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| author | Jonathan Marek <jonathan@marek.ca> | 2020-07-09 09:52:33 -0400 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2020-07-24 01:51:02 -0700 |
| commit | c8b9002f44e4a1d2771b2f59f6de900864b1f9d7 (patch) | |
| tree | 82bfc0a5bbc92db144b9512346e7db73d2e588d8 /drivers | |
| parent | 667f39b59b494d96ae70f4217637db2ebbee3df0 (diff) | |
| download | linux-stable-c8b9002f44e4a1d2771b2f59f6de900864b1f9d7.tar.gz linux-stable-c8b9002f44e4a1d2771b2f59f6de900864b1f9d7.tar.bz2 linux-stable-c8b9002f44e4a1d2771b2f59f6de900864b1f9d7.zip | |
clk: qcom: clk-alpha-pll: remove unused/incorrect PLL_CAL_VAL
0x44 isn't a register offset, it is the value that goes into CAL_L_VAL.
Fixes: 548a909597d5 ("clk: qcom: clk-alpha-pll: Add support for Trion PLLs")
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20200709135251.643-3-jonathan@marek.ca
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/clk/qcom/clk-alpha-pll.c | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/drivers/clk/qcom/clk-alpha-pll.c b/drivers/clk/qcom/clk-alpha-pll.c index 9b2dfa08acb2..1325139173c9 100644 --- a/drivers/clk/qcom/clk-alpha-pll.c +++ b/drivers/clk/qcom/clk-alpha-pll.c @@ -56,7 +56,6 @@ #define PLL_STATUS(p) ((p)->offset + (p)->regs[PLL_OFF_STATUS]) #define PLL_OPMODE(p) ((p)->offset + (p)->regs[PLL_OFF_OPMODE]) #define PLL_FRAC(p) ((p)->offset + (p)->regs[PLL_OFF_FRAC]) -#define PLL_CAL_VAL(p) ((p)->offset + (p)->regs[PLL_OFF_CAL_VAL]) const u8 clk_alpha_pll_regs[][PLL_OFF_MAX_REGS] = { [CLK_ALPHA_PLL_TYPE_DEFAULT] = { @@ -115,7 +114,6 @@ const u8 clk_alpha_pll_regs[][PLL_OFF_MAX_REGS] = { [PLL_OFF_STATUS] = 0x30, [PLL_OFF_OPMODE] = 0x38, [PLL_OFF_ALPHA_VAL] = 0x40, - [PLL_OFF_CAL_VAL] = 0x44, }, [CLK_ALPHA_PLL_TYPE_LUCID] = { [PLL_OFF_L_VAL] = 0x04, |