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author | Matt Roper <matthew.d.roper@intel.com> | 2023-02-13 16:19:06 -0800 |
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committer | Matt Roper <matthew.d.roper@intel.com> | 2023-02-15 13:33:50 -0800 |
commit | d6683bbe70d4cdbf3da6acecf7d569cc6f0b4382 (patch) | |
tree | cea59e19b6c79b80296e74df956e233b431076b6 /drivers | |
parent | 4583d6beb04976dff3440b1efd2c5956997fd839 (diff) | |
download | linux-stable-d6683bbe70d4cdbf3da6acecf7d569cc6f0b4382.tar.gz linux-stable-d6683bbe70d4cdbf3da6acecf7d569cc6f0b4382.tar.bz2 linux-stable-d6683bbe70d4cdbf3da6acecf7d569cc6f0b4382.zip |
drm/i915/xelpmp: Consider GSI offset when doing MCR lookups
MCR range tables use the final MMIO offset of a register (including the
0x380000 GSI offset when applicable). Since the i915_mcr_reg_t passed
as a parameter during steering lookup does not include the GSI offset,
we need to add it back in for GSI registers before searching the tables.
Fixes: a7ec65fc7e83 ("drm/i915/xelpmp: Add multicast steering for media GT")
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230214001906.1477370-1-matthew.d.roper@intel.com
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/gpu/drm/i915/gt/intel_gt_mcr.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_mcr.c b/drivers/gpu/drm/i915/gt/intel_gt_mcr.c index a4a8b8bc5737..03632df27de3 100644 --- a/drivers/gpu/drm/i915/gt/intel_gt_mcr.c +++ b/drivers/gpu/drm/i915/gt/intel_gt_mcr.c @@ -561,12 +561,15 @@ static bool reg_needs_read_steering(struct intel_gt *gt, i915_mcr_reg_t reg, enum intel_steering_type type) { - const u32 offset = i915_mmio_reg_offset(reg); + u32 offset = i915_mmio_reg_offset(reg); const struct intel_mmio_range *entry; if (likely(!gt->steering_table[type])) return false; + if (IS_GSI_REG(offset)) + offset += gt->uncore->gsi_offset; + for (entry = gt->steering_table[type]; entry->end; entry++) { if (offset >= entry->start && offset <= entry->end) return true; |