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author | Yongqiang Sun <yongqiang.sun@amd.com> | 2017-07-28 15:33:38 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2017-09-26 18:15:59 -0400 |
commit | d70ccd4a65373599fe9aa999dff07c05ea2893e6 (patch) | |
tree | f778e6495b3ae94a809cfbbea92e657435e5280e /drivers | |
parent | e75504b1292f3a9a173789a06a674fb3ba04450f (diff) | |
download | linux-stable-d70ccd4a65373599fe9aa999dff07c05ea2893e6.tar.gz linux-stable-d70ccd4a65373599fe9aa999dff07c05ea2893e6.tar.bz2 linux-stable-d70ccd4a65373599fe9aa999dff07c05ea2893e6.zip |
drm/amd/display: Keep blank until set visibility to true after mode switch
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/core/dc.c | 21 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.c | 4 |
2 files changed, 13 insertions, 12 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c index 83b8b196cc1e..ba8093317aa9 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc.c @@ -1609,12 +1609,10 @@ void dc_update_surfaces_and_stream(struct dc *dc, if (!pipe_ctx->surface || pipe_ctx->top_pipe) continue; - if (!pipe_ctx->tg->funcs->is_blanked(pipe_ctx->tg)) { - core_dc->hwss.pipe_control_lock( - core_dc, - pipe_ctx, - true); - } + core_dc->hwss.pipe_control_lock( + core_dc, + pipe_ctx, + true); } if (update_type == UPDATE_TYPE_FULL) break; @@ -1697,12 +1695,11 @@ void dc_update_surfaces_and_stream(struct dc *dc, if (!pipe_ctx->surface || pipe_ctx->top_pipe) continue; - if (!pipe_ctx->tg->funcs->is_blanked(pipe_ctx->tg)) { - core_dc->hwss.pipe_control_lock( - core_dc, - pipe_ctx, - false); - } + core_dc->hwss.pipe_control_lock( + core_dc, + pipe_ctx, + false); + break; } } diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.c b/drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.c index a8c254f66c98..c46b3e82cdcc 100644 --- a/drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.c +++ b/drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.c @@ -52,6 +52,10 @@ void dce_pipe_control_lock(struct core_dc *dc, uint32_t dcp_grph, scl, blnd, update_lock_mode, val; struct dce_hwseq *hws = dc->hwseq; + /* Not lock pipe when blank */ + if (lock && pipe->tg->funcs->is_blanked(pipe->tg)) + return; + val = REG_GET_4(BLND_V_UPDATE_LOCK[pipe->pipe_idx], BLND_DCP_GRPH_V_UPDATE_LOCK, &dcp_grph, BLND_SCL_V_UPDATE_LOCK, &scl, |