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author | Dave Stevenson <dave.stevenson@raspberrypi.com> | 2022-06-13 16:47:40 +0200 |
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committer | Maxime Ripard <maxime@cerno.tech> | 2022-06-28 14:55:30 +0200 |
commit | edfe84ae0df16be1251b5a8e840d95f1f3827500 (patch) | |
tree | 5c8725787e488059adc399af077802180bfe8063 /drivers | |
parent | 3b45eee87da171caa28f61240ddb5c21170cda53 (diff) | |
download | linux-stable-edfe84ae0df16be1251b5a8e840d95f1f3827500.tar.gz linux-stable-edfe84ae0df16be1251b5a8e840d95f1f3827500.tar.bz2 linux-stable-edfe84ae0df16be1251b5a8e840d95f1f3827500.zip |
drm/vc4: dsi: Correct pixel order for DSI0
For slightly unknown reasons, dsi0 takes a different pixel format
to dsi1, and that has to be set in the pixel valve.
Amend the setup accordingly.
Fixes: a86773d120d7 ("drm/vc4: Add support for feeding DSI encoders from the pixel valve.")
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Link: https://lore.kernel.org/r/20220613144800.326124-14-maxime@cerno.tech
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/gpu/drm/vc4/vc4_crtc.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c index 0b80d84a92bd..e144ff192f44 100644 --- a/drivers/gpu/drm/vc4/vc4_crtc.c +++ b/drivers/gpu/drm/vc4/vc4_crtc.c @@ -320,7 +320,8 @@ static void vc4_crtc_config_pv(struct drm_crtc *crtc, struct drm_encoder *encode u32 pixel_rep = (mode->flags & DRM_MODE_FLAG_DBLCLK) ? 2 : 1; bool is_dsi = (vc4_encoder->type == VC4_ENCODER_TYPE_DSI0 || vc4_encoder->type == VC4_ENCODER_TYPE_DSI1); - u32 format = is_dsi ? PV_CONTROL_FORMAT_DSIV_24 : PV_CONTROL_FORMAT_24; + bool is_dsi1 = vc4_encoder->type == VC4_ENCODER_TYPE_DSI1; + u32 format = is_dsi1 ? PV_CONTROL_FORMAT_DSIV_24 : PV_CONTROL_FORMAT_24; u8 ppc = pv_data->pixels_per_clock; bool debug_dump_regs = false; |