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| author | Dario Binacchi <dariobin@libero.it> | 2021-03-22 22:33:36 +0100 |
|---|---|---|
| committer | Jyri Sarha <jyri.sarha@iki.fi> | 2021-03-24 12:05:28 +0200 |
| commit | fd1d9e2d4382674f421bab003f9a64cc27b003f4 (patch) | |
| tree | f8ca74871d974a07c9c78082a92dd1ff7bf80fb3 /drivers | |
| parent | e17d1364dc3956e39980d12a3d8591bba4076f47 (diff) | |
| download | linux-stable-fd1d9e2d4382674f421bab003f9a64cc27b003f4.tar.gz linux-stable-fd1d9e2d4382674f421bab003f9a64cc27b003f4.tar.bz2 linux-stable-fd1d9e2d4382674f421bab003f9a64cc27b003f4.zip | |
drm/tilcdc: fix LCD pixel clock setting
The tilcdc_pclk_diff() compares the requested pixel clock rate to the
real one, so passing it clk_rate instead of clk_rate / clkdiv caused
it to fail even if the clk_rate was properly set. Adding the
real_pclk_rate variable makes the code more readable.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Jyri Sarha <jyri.sarha@iki.fi>
Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
Signed-off-by: Jyri Sarha <jyri.sarha@iki.fi>
Link: https://patchwork.freedesktop.org/patch/msgid/20210322213337.26667-3-dariobin@libero.it
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c index 3d0b7fbae02d..25278f59d165 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c +++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c @@ -203,7 +203,7 @@ static void tilcdc_crtc_set_clk(struct drm_crtc *crtc) struct drm_device *dev = crtc->dev; struct tilcdc_drm_private *priv = dev->dev_private; struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc); - unsigned long clk_rate, real_rate, pclk_rate; + unsigned long clk_rate, real_rate, real_pclk_rate, pclk_rate; unsigned int clkdiv; int ret; @@ -214,7 +214,8 @@ static void tilcdc_crtc_set_clk(struct drm_crtc *crtc) ret = clk_set_rate(priv->clk, pclk_rate * clkdiv); clk_rate = clk_get_rate(priv->clk); - if (ret < 0 || tilcdc_pclk_diff(pclk_rate, clk_rate) > 5) { + real_pclk_rate = clk_rate / clkdiv; + if (ret < 0 || tilcdc_pclk_diff(pclk_rate, real_pclk_rate) > 5) { /* * If we fail to set the clock rate (some architectures don't * use the common clock framework yet and may not implement |