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| author | Thomas Gleixner <tglx@linutronix.de> | 2014-04-16 14:36:44 +0000 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2014-04-17 23:36:28 +0200 |
| commit | ffde1de64012c406dfdda8690918248b472f24e4 (patch) | |
| tree | 4506aeedf6a322be1fbc9381569fb80499fc3ce1 /drivers | |
| parent | 01f8fa4f01d8362358eb90e412bd7ae18a3ec1ad (diff) | |
| download | linux-stable-ffde1de64012c406dfdda8690918248b472f24e4.tar.gz linux-stable-ffde1de64012c406dfdda8690918248b472f24e4.tar.bz2 linux-stable-ffde1de64012c406dfdda8690918248b472f24e4.zip | |
irqchip: Gic: Support forced affinity setting
To support the affinity setting of per cpu timers in the early startup
of a not yet online cpu, implement the force logic, which disables the
cpu online check.
Tagged for stable to allow a simple fix of the affected SoC clock
event drivers.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Marek Szyprowski <m.szyprowski@samsung.com>
Cc: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Cc: Tomasz Figa <t.figa@samsung.com>,
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>,
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: linux-arm-kernel@lists.infradead.org,
Cc: stable@vger.kernel.org
Link: http://lkml.kernel.org/r/20140416143315.916984416@linutronix.de
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/irqchip/irq-gic.c | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c index 4300b6606f5e..57d165e026f4 100644 --- a/drivers/irqchip/irq-gic.c +++ b/drivers/irqchip/irq-gic.c @@ -246,10 +246,14 @@ static int gic_set_affinity(struct irq_data *d, const struct cpumask *mask_val, bool force) { void __iomem *reg = gic_dist_base(d) + GIC_DIST_TARGET + (gic_irq(d) & ~3); - unsigned int shift = (gic_irq(d) % 4) * 8; - unsigned int cpu = cpumask_any_and(mask_val, cpu_online_mask); + unsigned int cpu, shift = (gic_irq(d) % 4) * 8; u32 val, mask, bit; + if (!force) + cpu = cpumask_any_and(mask_val, cpu_online_mask); + else + cpu = cpumask_first(mask_val); + if (cpu >= NR_GIC_CPU_IF || cpu >= nr_cpu_ids) return -EINVAL; |