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author | Sriram Periyasamy <sriramx.periyasamy@intel.com> | 2018-01-04 16:55:14 +0530 |
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committer | Mark Brown <broonie@kernel.org> | 2018-01-26 12:51:21 +0000 |
commit | 01f50d69bebe1bb0b30bba1eba3cdaf1f02dd7c4 (patch) | |
tree | ca17ceb027f460797027d3095c0a748578cac40c /fs/coda/cnode.c | |
parent | e29a22a86a20ea7651ff8c731ab034c31bd9764e (diff) | |
download | linux-stable-01f50d69bebe1bb0b30bba1eba3cdaf1f02dd7c4.tar.gz linux-stable-01f50d69bebe1bb0b30bba1eba3cdaf1f02dd7c4.tar.bz2 linux-stable-01f50d69bebe1bb0b30bba1eba3cdaf1f02dd7c4.zip |
ASoC: Intel: Skylake: Add ssp clock driver
For certain platforms, it is required to start the clocks (mclk/sclk/fs)
before the stream start. Example: for few chrome systems, codec needs the
mclk/sclk to be enabled early for a successful clock synchronization and
for few IVI platforms, clock need to be enabled at boot and should be ON
always.
Add the required structures and create set_dma_control ipc to enable or
disable the clock. To enable sclk without fs, mclk ipc structure is used,
else sclkfs ipc structure is used.
Clock prepare/unprepare are used to enable/disable the clock as the IPC
will be sent in non-atomic context. The clk set_dma_control IPC
structures are populated during the set_rate callback and IPC is sent
to enable the clock during prepare callback.
This patch creates virtual clock driver, which allows the machine driver
to use the clock interface to send IPCs to DSP to enable/disable the
clocks.
Signed-off-by: Sriram Periyasamy <sriramx.periyasamy@intel.com>
Signed-off-by: Jaikrishna Nemallapudi <jaikrishnax.nemallapudi@intel.com>
Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'fs/coda/cnode.c')
0 files changed, 0 insertions, 0 deletions