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| author | Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> | 2023-09-29 08:39:07 +0300 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2023-10-13 09:38:05 +0200 |
| commit | 60e4dc192ce2ebabcdd7c3487387a802110dc1a5 (patch) | |
| tree | 08f7706f3c3b3ed4b00506062d226a3103239842 /fs/hfsplus | |
| parent | ae5b425faf1074a757fad093085f6be654b7db99 (diff) | |
| download | linux-stable-60e4dc192ce2ebabcdd7c3487387a802110dc1a5.tar.gz linux-stable-60e4dc192ce2ebabcdd7c3487387a802110dc1a5.tar.bz2 linux-stable-60e4dc192ce2ebabcdd7c3487387a802110dc1a5.zip | |
dt-bindings: pinctrl: renesas: Document RZ/G3S SoC
Add documentation for the pin controller found on the Renesas RZ/G3S
(R9A08G045) SoC. Compared to RZ/G2{L,UL}, RZ/G3S has 82 general-purpose
IOs, no slew rate and output impedance support, and more values for
drive strength which needs to be expressed in microamp.
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230929053915.1530607-21-claudiu.beznea@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'fs/hfsplus')
0 files changed, 0 insertions, 0 deletions