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author | Rafael J. Wysocki <rafael.j.wysocki@intel.com> | 2015-04-15 04:00:27 +0200 |
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committer | Rafael J. Wysocki <rafael.j.wysocki@intel.com> | 2015-04-15 04:00:27 +0200 |
commit | 0ee0d34985ceffe4036319e1e46df8bff591b9e3 (patch) | |
tree | 526ac2e7e2fd914a3488cb6624997fe3091116d9 /include/acpi | |
parent | 2b5083e51088253b1b3e126934c9200d8a3493ab (diff) | |
download | linux-stable-0ee0d34985ceffe4036319e1e46df8bff591b9e3.tar.gz linux-stable-0ee0d34985ceffe4036319e1e46df8bff591b9e3.tar.bz2 linux-stable-0ee0d34985ceffe4036319e1e46df8bff591b9e3.zip |
ACPICA: Store GPE register enable masks upfront
It is reported that ACPI interrupts do not work any more on
Dell Latitude D600 after commit c50f13c672df (ACPICA: Save
current masks of enabled GPEs after enable register writes).
The problem turns out to be related to the fact that the
enable_mask and enable_for_run GPE bit masks are not in
sync (in the absence of any system suspend/resume events)
for at least one GPE register on that machine.
Address this problem by writing the enable_for_run mask into
enable_mask as soon as enable_for_run is updated instead of
doing that only after the subsequent register write has
succeeded. For consistency, update acpi_hw_gpe_enable_write()
to store the bit mask to be written into the GPE register
in enable_mask unconditionally before the write.
Since the ACPI_GPE_SAVE_MASK flag is not necessary any more after
that, drop it along with the symbols depending on it.
Reported-and-tested-by: Jim Bos <jim876@xs4all.nl>
Fixes: c50f13c672df (ACPICA: Save current masks of enabled GPEs after enable register writes)
Cc: 3.19+ <stable@vger.kernel.org> # 3.19+
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'include/acpi')
-rw-r--r-- | include/acpi/actypes.h | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/include/acpi/actypes.h b/include/acpi/actypes.h index ace520f3780e..f5ca0e989bba 100644 --- a/include/acpi/actypes.h +++ b/include/acpi/actypes.h @@ -759,10 +759,6 @@ typedef u32 acpi_event_status; #define ACPI_GPE_ENABLE 0 #define ACPI_GPE_DISABLE 1 #define ACPI_GPE_CONDITIONAL_ENABLE 2 -#define ACPI_GPE_SAVE_MASK 4 - -#define ACPI_GPE_ENABLE_SAVE (ACPI_GPE_ENABLE | ACPI_GPE_SAVE_MASK) -#define ACPI_GPE_DISABLE_SAVE (ACPI_GPE_DISABLE | ACPI_GPE_SAVE_MASK) /* * GPE info flags - Per GPE |