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author | Jesper Nilsson <jesper.nilsson@axis.com> | 2007-11-30 10:11:43 +0100 |
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committer | Jesper Nilsson <jesper.nilsson@axis.com> | 2008-02-08 11:06:24 +0100 |
commit | 738af38bbc8bb4a5b081935c47744fdb7bf0f70b (patch) | |
tree | 6ab7708dee8bb01bc10e1c22b3b28c154dddc12d /include/asm-cris | |
parent | 642d4ea0656f30257a1dcab65133a2f6aabffca5 (diff) | |
download | linux-stable-738af38bbc8bb4a5b081935c47744fdb7bf0f70b.tar.gz linux-stable-738af38bbc8bb4a5b081935c47744fdb7bf0f70b.tar.bz2 linux-stable-738af38bbc8bb4a5b081935c47744fdb7bf0f70b.zip |
CRIS v32: Add prototypes for cache flushing
We need these to work around some cache bugs in CRISv32 chips.
Diffstat (limited to 'include/asm-cris')
-rw-r--r-- | include/asm-cris/arch-v32/cache.h | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/include/asm-cris/arch-v32/cache.h b/include/asm-cris/arch-v32/cache.h index 80b236b15319..b3d752dfe15b 100644 --- a/include/asm-cris/arch-v32/cache.h +++ b/include/asm-cris/arch-v32/cache.h @@ -1,8 +1,19 @@ #ifndef _ASM_CRIS_ARCH_CACHE_H #define _ASM_CRIS_ARCH_CACHE_H +#include <asm/arch/hwregs/dma.h> + /* A cache-line is 32 bytes. */ #define L1_CACHE_BYTES 32 #define L1_CACHE_SHIFT 5 +void flush_dma_list(dma_descr_data *descr); +void flush_dma_descr(dma_descr_data *descr, int flush_buf); + +#define flush_dma_context(c) \ + flush_dma_list(phys_to_virt((c)->saved_data)); + +void cris_flush_cache_range(void *buf, unsigned long len); +void cris_flush_cache(void); + #endif /* _ASM_CRIS_ARCH_CACHE_H */ |