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author | Thomas Abraham <thomas.ab@samsung.com> | 2014-07-14 19:08:34 +0530 |
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committer | Tomasz Figa <t.figa@samsung.com> | 2014-07-26 02:50:15 +0200 |
commit | ca5b4029382245397dd6829c6321121cab1a1471 (patch) | |
tree | 50b327d18f7d33b64b277a8dd009c14f932b043c /include/dt-bindings/clock/exynos4.h | |
parent | e9d529562a8ca5f293032f5aca3060eeb9c406bb (diff) | |
download | linux-stable-ca5b4029382245397dd6829c6321121cab1a1471.tar.gz linux-stable-ca5b4029382245397dd6829c6321121cab1a1471.tar.bz2 linux-stable-ca5b4029382245397dd6829c6321121cab1a1471.zip |
clk: samsung: register exynos5420 apll/kpll configuration data
Register the PLL configuration data for APLL and KPLL on Exynos5420. This
configuration data table specifies PLL coefficients for supported PLL
clock speeds when a 24MHz clock is supplied as the input clock source
for these PLLs.
Cc: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Reviewed-by: Amit Daniel Kachhap <amit.daniel@samsung.com>
Tested-by: Arjun K.V <arjun.kv@samsung.com>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Diffstat (limited to 'include/dt-bindings/clock/exynos4.h')
0 files changed, 0 insertions, 0 deletions