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authorMohan Kumar <mkumard@nvidia.com>2022-02-16 14:52:38 +0530
committerThierry Reding <treding@nvidia.com>2022-02-24 18:34:33 +0100
commit07d743902a1205d54d93c0637c22575811014431 (patch)
tree226b5f27b4a8dc78ffbc654738c225a4c747a4b2 /include/dt-bindings
parent40efe139ff605d80cc829ddf8c50c71d20399bf8 (diff)
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dt-bindings: Add HDA support for Tegra234
Add hda clocks, memory ,power and reset binding entries for Tegra234. Signed-off-by: Mohan Kumar <mkumard@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'include/dt-bindings')
-rw-r--r--include/dt-bindings/clock/tegra234-clock.h4
-rw-r--r--include/dt-bindings/memory/tegra234-mc.h5
-rw-r--r--include/dt-bindings/power/tegra234-powergate.h1
-rw-r--r--include/dt-bindings/reset/tegra234-reset.h2
4 files changed, 12 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/tegra234-clock.h b/include/dt-bindings/clock/tegra234-clock.h
index 5c201a8278ff..0c38769c4a76 100644
--- a/include/dt-bindings/clock/tegra234-clock.h
+++ b/include/dt-bindings/clock/tegra234-clock.h
@@ -136,4 +136,8 @@
#define TEGRA234_CLK_PLLC4 237U
/** @brief 32K input clock provided by PMIC */
#define TEGRA234_CLK_CLK_32K 289U
+/** @brief CLK_RST_CONTROLLER_AZA2XBITCLK_OUT_SWITCH_DIVIDER switch divider output (aza_2xbitclk) */
+#define TEGRA234_CLK_AZA_2XBIT 457U
+/** @brief aza_2xbitclk / 2 (aza_bitclk) */
+#define TEGRA234_CLK_AZA_BIT 458U
#endif
diff --git a/include/dt-bindings/memory/tegra234-mc.h b/include/dt-bindings/memory/tegra234-mc.h
index 42661dda1c53..672b953cadd3 100644
--- a/include/dt-bindings/memory/tegra234-mc.h
+++ b/include/dt-bindings/memory/tegra234-mc.h
@@ -10,6 +10,7 @@
/* NISO0 stream IDs */
#define TEGRA234_SID_APE 0x02
+#define TEGRA234_SID_HDA 0x03
/* NISO1 stream IDs */
#define TEGRA234_SID_SDMMC4 0x02
@@ -19,6 +20,10 @@
* memory client IDs
*/
+/* High-definition audio (HDA) read clients */
+#define TEGRA234_MEMORY_CLIENT_HDAR 0x15
+/* High-definition audio (HDA) write clients */
+#define TEGRA234_MEMORY_CLIENT_HDAW 0x35
/* sdmmcd memory read client */
#define TEGRA234_MEMORY_CLIENT_SDMMCRAB 0x63
/* sdmmcd memory write client */
diff --git a/include/dt-bindings/power/tegra234-powergate.h b/include/dt-bindings/power/tegra234-powergate.h
index 8e28fcbdc038..a635a8b53810 100644
--- a/include/dt-bindings/power/tegra234-powergate.h
+++ b/include/dt-bindings/power/tegra234-powergate.h
@@ -5,5 +5,6 @@
#define __ABI_MACH_T234_POWERGATE_T234_H_
#define TEGRA234_POWER_DOMAIN_AUD 2U
+#define TEGRA234_POWER_DOMAIN_DISP 3U
#endif
diff --git a/include/dt-bindings/reset/tegra234-reset.h b/include/dt-bindings/reset/tegra234-reset.h
index ba390b86361d..178e73a687f0 100644
--- a/include/dt-bindings/reset/tegra234-reset.h
+++ b/include/dt-bindings/reset/tegra234-reset.h
@@ -10,6 +10,8 @@
* @brief Identifiers for Resets controllable by firmware
* @{
*/
+#define TEGRA234_RESET_HDA 20U
+#define TEGRA234_RESET_HDACODEC 21U
#define TEGRA234_RESET_I2C1 24U
#define TEGRA234_RESET_I2C2 29U
#define TEGRA234_RESET_I2C3 30U