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authorGeert Uytterhoeven <geert+renesas@glider.be>2024-03-01 19:23:45 +0100
committerUlf Hansson <ulf.hansson@linaro.org>2024-03-06 11:25:27 +0100
commitccabbb6768fc72d6cb0223324925c93658d91e63 (patch)
tree7e00c1fe2a89e962236162390a9b20db79201c41 /include/dt-bindings
parent04581ea2b2377c91f704b1170f8c97c957fb1330 (diff)
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pmdomain: renesas: rcar-gen4-sysc: Reduce atomic delays
The delays used with the various atomic polling loops are already at the maximum value of ~10µs, as documented for read_poll_timeout_atomic(). Hence reduce the delays from 10 to 1 µs. Increase PDRESR_RETRIES accordingly, to retain the old (generous) timeout value. Measurements on R-Car V3U, S4, V4H, and V4M show that the first three polling loops rarely (never?) loop, so the actual delay does not matter. The fourth loop (for SYSCISCR in rcar_gen4_sysc_power()) typically ran for one or two cycles with the old delay. With the reduced delay, it typically runs for two to 17 cycles, and finishes earlier than before, which can reduce loop time up to a factor of three. While at it, rename the SYSCISR_{TIMEOUT,DELAY_US} definitions to SYSCISCR_{TIMEOUT,DELAY_US}, to match the register name they apply to. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/77f150522096d55c6da0ff983db61e0cf6309344.1709317289.git.geert+renesas@glider.be Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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