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author | Geert Uytterhoeven <geert+renesas@glider.be> | 2015-08-04 14:28:02 +0200 |
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committer | Simon Horman <horms+renesas@verge.net.au> | 2015-08-12 10:31:26 +0900 |
commit | 752b5ed5f6998e118626feea7375782c4cf5aad6 (patch) | |
tree | 553132209bbbdf91664f0cdb58d1f6c3535e4d13 /include/linux/clk | |
parent | d770e558e21961ad6cfdf0ff7df0eb5d7d4f0754 (diff) | |
download | linux-stable-752b5ed5f6998e118626feea7375782c4cf5aad6.tar.gz linux-stable-752b5ed5f6998e118626feea7375782c4cf5aad6.tar.bz2 linux-stable-752b5ed5f6998e118626feea7375782c4cf5aad6.zip |
clk: shmobile: Add CPG/MSTP Clock Domain support
Add Clock Domain support to the Clock Pulse Generator (CPG) Module Stop
(MSTP) Clocks driver using the generic PM Domain. This allows to
power-manage the module clocks of SoC devices that are part of the
CPG/MSTP Clock Domain using Runtime PM, or for system suspend/resume.
SoC devices that are part of the CPG/MSTP Clock Domain and can be
power-managed through an MSTP clock should be tagged in DT with a
proper "power-domains" property.
The CPG/MSTP Clock Domain code will scan such devices for clocks that
are suitable for power-managing the device, by looking for a clock that
is compatible with "renesas,cpg-mstp-clocks".
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Reviewed-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'include/linux/clk')
-rw-r--r-- | include/linux/clk/shmobile.h | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/include/linux/clk/shmobile.h b/include/linux/clk/shmobile.h index 63a8159c4e64..cb19cc1865ca 100644 --- a/include/linux/clk/shmobile.h +++ b/include/linux/clk/shmobile.h @@ -16,8 +16,20 @@ #include <linux/types.h> +struct device; +struct device_node; +struct generic_pm_domain; + void r8a7778_clocks_init(u32 mode); void r8a7779_clocks_init(u32 mode); void rcar_gen2_clocks_init(u32 mode); +#ifdef CONFIG_PM_GENERIC_DOMAINS_OF +void cpg_mstp_add_clk_domain(struct device_node *np); +int cpg_mstp_attach_dev(struct generic_pm_domain *domain, struct device *dev); +void cpg_mstp_detach_dev(struct generic_pm_domain *domain, struct device *dev); +#else +static inline void cpg_mstp_add_clk_domain(struct device_node *np) {} +#endif + #endif |