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authorAndy Shevchenko <andriy.shevchenko@linux.intel.com>2019-01-07 13:07:40 +0200
committerVinod Koul <vkoul@kernel.org>2019-01-07 17:57:13 +0530
commit934891b0a16c55716de9cdd6cefc82cc2b75eb4a (patch)
tree48eb144f6899be60d12c4655fbd023f5e37546dc /include/linux/dma
parent91f0ff883e9ae654503fc62c588eefc8558e457f (diff)
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dmaengine: dw: Don't pollute CTL_LO on iDMA 32-bit
Intel iDMA 32-bit doesn't have a concept of bus masters and thus there is no need to setup any kind of masters in the CTL_LO register. Moreover, the burst size for memory-to-memory transfer is not what is says, we need to have a corrected list of possible sizes. Note, that the size of 8 items, each of that up to 4 bytes, is chosen because of maximum of 1/2 FIFO, which is 64 bytes on Intel Merrifield. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Vinod Koul <vkoul@kernel.org>
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