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authorMarco Felsch <m.felsch@pengutronix.de>2022-09-30 14:48:10 +0200
committerSakari Ailus <sakari.ailus@linux.intel.com>2022-10-27 14:38:04 +0300
commit22168675bae75e158c459ef2dee3b6ebd52a80ed (patch)
treebdb716e03686b78132b933e08f00728d55881163 /include/linux/phy
parent7afa5db0eaae8f6c110690311167d5e5cd728efb (diff)
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phy: dphy: add support to calculate the timing based on hs_clk_rate
For MIPI-CSI sender use-case it is common to specify the allowed link-frequencies which should be used for the MIPI link and is half the hs-clock rate. This commit adds a helper to calculate the D-PHY timing based on the hs-clock rate so we don't need to calculate the timings within the driver. Signed-off-by: Marco Felsch <m.felsch@pengutronix.de> Acked-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Diffstat (limited to 'include/linux/phy')
-rw-r--r--include/linux/phy/phy-mipi-dphy.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/include/linux/phy/phy-mipi-dphy.h b/include/linux/phy/phy-mipi-dphy.h
index a877ffee845d..1ac128d78dfe 100644
--- a/include/linux/phy/phy-mipi-dphy.h
+++ b/include/linux/phy/phy-mipi-dphy.h
@@ -279,6 +279,9 @@ int phy_mipi_dphy_get_default_config(unsigned long pixel_clock,
unsigned int bpp,
unsigned int lanes,
struct phy_configure_opts_mipi_dphy *cfg);
+int phy_mipi_dphy_get_default_config_for_hsclk(unsigned long long hs_clk_rate,
+ unsigned int lanes,
+ struct phy_configure_opts_mipi_dphy *cfg);
int phy_mipi_dphy_config_validate(struct phy_configure_opts_mipi_dphy *cfg);
#endif /* __PHY_MIPI_DPHY_H_ */