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| author | Bjorn Andersson <bjorn.andersson@linaro.org> | 2023-01-31 20:18:51 -0800 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2023-02-04 10:54:30 -0800 |
| commit | 58ef4ece1e41ac525db3e79529909683325d85df (patch) | |
| tree | 9c0acfe7cb017a83c52c19129f6a9b27b834bba7 /include/linux/soc | |
| parent | 68d868adc121f68edde0f4c0e16923103b868945 (diff) | |
| download | linux-stable-58ef4ece1e41ac525db3e79529909683325d85df.tar.gz linux-stable-58ef4ece1e41ac525db3e79529909683325d85df.tar.bz2 linux-stable-58ef4ece1e41ac525db3e79529909683325d85df.zip | |
soc: qcom: pmic_glink: Introduce base PMIC GLINK driver
The PMIC GLINK service runs on one of the co-processors of some modern
Qualcomm platforms and implements USB-C and battery managements. It uses
a message based protocol over GLINK for communication with the OS, hence
the name.
The driver implemented provides the rpmsg device for communication and
uses auxiliary bus to spawn off individual devices in respective
subsystem. The auxiliary devices are spawned off from a
platform_device, so that the drm_bridge is available early, to allow the
DisplayPort driver to probe even before the remoteproc has spun up.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Konrad Dybcio <konrad.dybcio@linaro.org> # SM8350 PDX215
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-MTP & SM8450-HDK
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230201041853.1934355-3-quic_bjorande@quicinc.com
Diffstat (limited to 'include/linux/soc')
| -rw-r--r-- | include/linux/soc/qcom/pmic_glink.h | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/include/linux/soc/qcom/pmic_glink.h b/include/linux/soc/qcom/pmic_glink.h new file mode 100644 index 000000000000..fd124aa18c81 --- /dev/null +++ b/include/linux/soc/qcom/pmic_glink.h @@ -0,0 +1,32 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2022, Linaro Ltd + */ +#ifndef __SOC_QCOM_PMIC_GLINK_H__ +#define __SOC_QCOM_PMIC_GLINK_H__ + +struct pmic_glink; +struct pmic_glink_client; + +#define PMIC_GLINK_OWNER_BATTMGR 32778 +#define PMIC_GLINK_OWNER_USBC 32779 +#define PMIC_GLINK_OWNER_USBC_PAN 32780 + +#define PMIC_GLINK_REQ_RESP 1 +#define PMIC_GLINK_NOTIFY 2 + +struct pmic_glink_hdr { + __le32 owner; + __le32 type; + __le32 opcode; +}; + +int pmic_glink_send(struct pmic_glink_client *client, void *data, size_t len); + +struct pmic_glink_client *devm_pmic_glink_register_client(struct device *dev, + unsigned int id, + void (*cb)(const void *, size_t, void *), + void (*pdr)(void *, int), + void *priv); + +#endif |