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| author | Miquel Raynal <miquel.raynal@bootlin.com> | 2022-01-27 10:18:01 +0100 |
|---|---|---|
| committer | Miquel Raynal <miquel.raynal@bootlin.com> | 2022-02-10 09:32:30 +0100 |
| commit | a433c2cbd75ab76f277364f44e76f32c7df306e7 (patch) | |
| tree | becfc03172904bfa00047e020f556c030e6209c6 /include/linux/spi | |
| parent | 9a15efc5d5e6b5beaed0883e5bdcd0b1384c1b20 (diff) | |
| download | linux-stable-a433c2cbd75ab76f277364f44e76f32c7df306e7.tar.gz linux-stable-a433c2cbd75ab76f277364f44e76f32c7df306e7.tar.bz2 linux-stable-a433c2cbd75ab76f277364f44e76f32c7df306e7.zip | |
spi: spi-mem: Add an ecc parameter to the spi_mem_op structure
Soon the SPI-NAND core will need a way to request a SPI controller to
enable ECC support for a given operation. This is because of the
pipelined integration of certain ECC engines, which are directly managed
by the SPI controller itself.
Introduce a spi_mem_op additional field for this purpose: ecc.
So far this field is left unset and checked to be false by all
the SPI controller drivers in their ->supports_op() hook, as they all
call spi_mem_default_supports_op().
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Link: https://lore.kernel.org/linux-mtd/20220127091808.1043392-7-miquel.raynal@bootlin.com
Diffstat (limited to 'include/linux/spi')
| -rw-r--r-- | include/linux/spi/spi-mem.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/include/linux/spi/spi-mem.h b/include/linux/spi/spi-mem.h index 4a1bfe689872..2ba044d0d5e5 100644 --- a/include/linux/spi/spi-mem.h +++ b/include/linux/spi/spi-mem.h @@ -89,6 +89,7 @@ enum spi_mem_data_dir { * @dummy.dtr: whether the dummy bytes should be sent in DTR mode or not * @data.buswidth: number of IO lanes used to send/receive the data * @data.dtr: whether the data should be sent in DTR mode or not + * @data.ecc: whether error correction is required or not * @data.dir: direction of the transfer * @data.nbytes: number of data bytes to send/receive. Can be zero if the * operation does not involve transferring data @@ -119,6 +120,7 @@ struct spi_mem_op { struct { u8 buswidth; u8 dtr : 1; + u8 ecc : 1; enum spi_mem_data_dir dir; unsigned int nbytes; union { @@ -288,9 +290,11 @@ struct spi_controller_mem_ops { /** * struct spi_controller_mem_caps - SPI memory controller capabilities * @dtr: Supports DTR operations + * @ecc: Supports operations with error correction */ struct spi_controller_mem_caps { bool dtr; + bool ecc; }; #define spi_mem_controller_is_capable(ctlr, cap) \ |