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| author | Gal Pressman <gal@nvidia.com> | 2024-05-22 22:26:54 +0300 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2024-05-24 13:27:07 +0100 |
| commit | 1b9f86c6d53245dab087f1b2c05727b5982142ff (patch) | |
| tree | 3b144c57e5285d4a22ef8cb287651da3fcb04d51 /include/linux | |
| parent | fca3b4791850b7e2181f0b3195b66d53df83151b (diff) | |
| download | linux-stable-1b9f86c6d53245dab087f1b2c05727b5982142ff.tar.gz linux-stable-1b9f86c6d53245dab087f1b2c05727b5982142ff.tar.bz2 linux-stable-1b9f86c6d53245dab087f1b2c05727b5982142ff.zip | |
net/mlx5: Fix MTMP register capability offset in MCAM register
The MTMP register (0x900a) capability offset is off-by-one, move it to
the right place.
Fixes: 1f507e80c700 ("net/mlx5: Expose NIC temperature via hardware monitoring kernel API")
Signed-off-by: Gal Pressman <gal@nvidia.com>
Reviewed-by: Cosmin Ratiu <cratiu@nvidia.com>
Signed-off-by: Tariq Toukan <tariqt@nvidia.com>
Reviewed-by: Simon Horman <horms@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include/linux')
| -rw-r--r-- | include/linux/mlx5/mlx5_ifc.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h index f468763478ae..5df52e15f7d6 100644 --- a/include/linux/mlx5/mlx5_ifc.h +++ b/include/linux/mlx5/mlx5_ifc.h @@ -10308,9 +10308,9 @@ struct mlx5_ifc_mcam_access_reg_bits { u8 mfrl[0x1]; u8 regs_39_to_32[0x8]; - u8 regs_31_to_10[0x16]; + u8 regs_31_to_11[0x15]; u8 mtmp[0x1]; - u8 regs_8_to_0[0x9]; + u8 regs_9_to_0[0xa]; }; struct mlx5_ifc_mcam_access_reg_bits1 { |