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author | Alex Deucher <alexander.deucher@amd.com> | 2020-10-06 16:54:35 -0400 |
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committer | Alex Deucher <alexander.deucher@amd.com> | 2023-10-05 17:49:39 -0400 |
commit | 7a41ed8b59ba74ae36adc7f4688feff9e710cf76 (patch) | |
tree | ff893d4a068196d39880df3103f6f2b39a1a4082 /include/uapi/drm/amdgpu_drm.h | |
parent | 9cff0879aefeca6eba586f02cad337e409e4f2b0 (diff) | |
download | linux-stable-7a41ed8b59ba74ae36adc7f4688feff9e710cf76.tar.gz linux-stable-7a41ed8b59ba74ae36adc7f4688feff9e710cf76.tar.bz2 linux-stable-7a41ed8b59ba74ae36adc7f4688feff9e710cf76.zip |
drm/amdgpu: add new INFO ioctl query for the last GPU page fault
Add a interface to query the last GPU page fault for the process.
Useful for debugging context lost errors.
v2: split vmhub representation between kernel and userspace
v3: add locking when fetching fault info in INFO IOCTL
Mesa MR: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23238
libdrm MR: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23238
Cc: samuel.pitoiset@gmail.com
Reviewed-by: Christian König <christian.koenig@amd.com>
Acked-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'include/uapi/drm/amdgpu_drm.h')
-rw-r--r-- | include/uapi/drm/amdgpu_drm.h | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h index 984fc16577ca..d627d0c6ac87 100644 --- a/include/uapi/drm/amdgpu_drm.h +++ b/include/uapi/drm/amdgpu_drm.h @@ -906,6 +906,8 @@ struct drm_amdgpu_cs_chunk_cp_gfx_shadow { #define AMDGPU_INFO_VIDEO_CAPS_ENCODE 1 /* Query the max number of IBs per gang per submission */ #define AMDGPU_INFO_MAX_IBS 0x22 +/* query last page fault info */ +#define AMDGPU_INFO_GPUVM_FAULT 0x23 #define AMDGPU_INFO_MMR_SE_INDEX_SHIFT 0 #define AMDGPU_INFO_MMR_SE_INDEX_MASK 0xff @@ -1231,6 +1233,20 @@ struct drm_amdgpu_info_video_caps { struct drm_amdgpu_info_video_codec_info codec_info[AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_COUNT]; }; +#define AMDGPU_VMHUB_TYPE_MASK 0xff +#define AMDGPU_VMHUB_TYPE_SHIFT 0 +#define AMDGPU_VMHUB_TYPE_GFX 0 +#define AMDGPU_VMHUB_TYPE_MM0 1 +#define AMDGPU_VMHUB_TYPE_MM1 2 +#define AMDGPU_VMHUB_IDX_MASK 0xff00 +#define AMDGPU_VMHUB_IDX_SHIFT 8 + +struct drm_amdgpu_info_gpuvm_fault { + __u64 addr; + __u32 status; + __u32 vmhub; +}; + /* * Supported GPU families */ |