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authorMarek Olšák <marek.olsak@amd.com>2022-12-24 17:44:26 -0500
committerAlex Deucher <alexander.deucher@amd.com>2023-01-19 17:24:26 -0500
commite3e84b0a03a303421704bd3f305ca91a5226dc7d (patch)
tree5e4de0a9f104eb79d3a1b6f7101e2afa14c7dc93 /include/uapi/drm/amdgpu_drm.h
parent26fd808b01e730fd45673619817a3feafb1230d7 (diff)
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drm/amdgpu: return the PCIe gen and lanes from the INFO ioctl
For computing PCIe bandwidth in userspace and troubleshooting PCIe bandwidth issues. Note that this intentionally fills holes and padding in drm_amdgpu_info_device. Mesa MR: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20790 Signed-off-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'include/uapi/drm/amdgpu_drm.h')
-rw-r--r--include/uapi/drm/amdgpu_drm.h6
1 files changed, 4 insertions, 2 deletions
diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h
index fe7f871e3080..973af6d06626 100644
--- a/include/uapi/drm/amdgpu_drm.h
+++ b/include/uapi/drm/amdgpu_drm.h
@@ -1053,7 +1053,8 @@ struct drm_amdgpu_info_device {
__u32 enabled_rb_pipes_mask;
__u32 num_rb_pipes;
__u32 num_hw_gfx_contexts;
- __u32 _pad;
+ /* PCIe version (the smaller of the GPU and the CPU/motherboard) */
+ __u32 pcie_gen;
__u64 ids_flags;
/** Starting virtual address for UMDs. */
__u64 virtual_address_offset;
@@ -1100,7 +1101,8 @@ struct drm_amdgpu_info_device {
__u32 gs_prim_buffer_depth;
/* max gs wavefront per vgt*/
__u32 max_gs_waves_per_vgt;
- __u32 _pad1;
+ /* PCIe number of lanes (the smaller of the GPU and the CPU/motherboard) */
+ __u32 pcie_num_lanes;
/* always on cu bitmap */
__u32 cu_ao_bitmap[4][4];
/** Starting high virtual address for UMDs. */