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author | Daniel Lezcano <daniel.lezcano@linaro.org> | 2013-10-03 16:13:51 +0200 |
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committer | Daniel Lezcano <daniel.lezcano@linaro.org> | 2013-10-03 16:13:51 +0200 |
commit | 191124efb4d6e5e47fe073b4b97350873523e88c (patch) | |
tree | 8fb9dbbff739e19aa1750c58fe5ec12ee6547e49 /include | |
parent | 68e90740284c69292881cd38c7ece6f09a18a58f (diff) | |
parent | 346e7480f1d4740b3d798da60f83f087ea6488b4 (diff) | |
download | linux-stable-191124efb4d6e5e47fe073b4b97350873523e88c.tar.gz linux-stable-191124efb4d6e5e47fe073b4b97350873523e88c.tar.bz2 linux-stable-191124efb4d6e5e47fe073b4b97350873523e88c.zip |
Merge branch 'timer_evtstrm' of git://linux-arm.org/linux-skn into clockevents/3.13
Adds support to configure the rate and enable the event stream for architected
timer. The event streams can be used to impose a timeout on a wfe, to safeguard
against any programming error in case an expected event is not generated or
even to implement wfe-based timeouts for userspace locking implementations.
This feature can be disabled(enabled by default).
Since the timer control register is reset to zero on warm boot, CPU PM notifier
is added to save and restore the value.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Diffstat (limited to 'include')
-rw-r--r-- | include/clocksource/arm_arch_timer.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/include/clocksource/arm_arch_timer.h b/include/clocksource/arm_arch_timer.h index 93b7f96f9c59..6d26b40cbf5d 100644 --- a/include/clocksource/arm_arch_timer.h +++ b/include/clocksource/arm_arch_timer.h @@ -33,6 +33,16 @@ enum arch_timer_reg { #define ARCH_TIMER_MEM_PHYS_ACCESS 2 #define ARCH_TIMER_MEM_VIRT_ACCESS 3 +#define ARCH_TIMER_USR_PCT_ACCESS_EN (1 << 0) /* physical counter */ +#define ARCH_TIMER_USR_VCT_ACCESS_EN (1 << 1) /* virtual counter */ +#define ARCH_TIMER_VIRT_EVT_EN (1 << 2) +#define ARCH_TIMER_EVT_TRIGGER_SHIFT (4) +#define ARCH_TIMER_EVT_TRIGGER_MASK (0xF << ARCH_TIMER_EVT_TRIGGER_SHIFT) +#define ARCH_TIMER_USR_VT_ACCESS_EN (1 << 8) /* virtual timer registers */ +#define ARCH_TIMER_USR_PT_ACCESS_EN (1 << 9) /* physical timer registers */ + +#define ARCH_TIMER_EVT_STREAM_FREQ 10000 /* 100us */ + #ifdef CONFIG_ARM_ARCH_TIMER extern u32 arch_timer_get_rate(void); |