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| author | Huy Nguyen <huyn@mellanox.com> | 2016-11-27 17:02:04 +0200 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2016-11-28 15:09:34 -0500 |
| commit | 3a6a931dfb8e49a7377825b465d84e110fe89f68 (patch) | |
| tree | 2ec77660c9656ccd2d303d006b47e4c453ecbb08 /include | |
| parent | 80653f73c53de8f5874e03d0d3bdd1943c2a33cf (diff) | |
| download | linux-stable-3a6a931dfb8e49a7377825b465d84e110fe89f68.tar.gz linux-stable-3a6a931dfb8e49a7377825b465d84e110fe89f68.tar.bz2 linux-stable-3a6a931dfb8e49a7377825b465d84e110fe89f68.zip | |
net/mlx5e: Support DCBX CEE API
Add DCBX CEE API interface for ConnectX-4. Configurations are stored in
a temporary structure and are applied to the card's firmware when
the CEE's setall callback function is called.
Note:
priority group in CEE is equivalent to traffic class in ConnectX-4
hardware spec.
bw allocation per priority in CEE is not supported because ConnectX-4
only supports bw allocation per traffic class.
user priority in CEE does not have an equivalent term in ConnectX-4.
Therefore, user priority to priority mapping in CEE is not supported.
Signed-off-by: Huy Nguyen <huyn@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include')
| -rw-r--r-- | include/linux/mlx5/port.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/include/linux/mlx5/port.h b/include/linux/mlx5/port.h index dde8c7ec5ff1..bdee439f8cf3 100644 --- a/include/linux/mlx5/port.h +++ b/include/linux/mlx5/port.h @@ -141,8 +141,12 @@ int mlx5_query_port_pfc(struct mlx5_core_dev *dev, u8 *pfc_en_tx, int mlx5_max_tc(struct mlx5_core_dev *mdev); int mlx5_set_port_prio_tc(struct mlx5_core_dev *mdev, u8 *prio_tc); +int mlx5_query_port_prio_tc(struct mlx5_core_dev *mdev, + u8 prio, u8 *tc); int mlx5_set_port_tc_group(struct mlx5_core_dev *mdev, u8 *tc_group); int mlx5_set_port_tc_bw_alloc(struct mlx5_core_dev *mdev, u8 *tc_bw); +int mlx5_query_port_tc_bw_alloc(struct mlx5_core_dev *mdev, + u8 tc, u8 *bw_pct); int mlx5_modify_port_ets_rate_limit(struct mlx5_core_dev *mdev, u8 *max_bw_value, u8 *max_bw_unit); |