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| author | Meir Lichtinger <meirl@mellanox.com> | 2020-07-16 13:52:48 +0300 |
|---|---|---|
| committer | Jason Gunthorpe <jgg@nvidia.com> | 2020-07-27 11:19:00 -0300 |
| commit | 896ec9735336f5adb576d372ed7e411bce2fc74c (patch) | |
| tree | 44795483513ac06fe75e3c8a7ea864636118f30e /include | |
| parent | 2224635938814fc63004e30f7c41943812bd6f1c (diff) | |
| download | linux-stable-896ec9735336f5adb576d372ed7e411bce2fc74c.tar.gz linux-stable-896ec9735336f5adb576d372ed7e411bce2fc74c.tar.bz2 linux-stable-896ec9735336f5adb576d372ed7e411bce2fc74c.zip | |
RDMA/mlx5: Set mkey relaxed ordering by UMR with ConnectX-7
Up to ConnectX-7 UMR is not used when user passes relaxed ordering access
flag. ConnectX-7 supports setting relaxed ordering read/write mkey
attribute by UMR, indicated by new HCA capabilities.
With ConnectX-7 driver uses UMR when user set relaxed ordering access
flag, in contrast to previous silicon models. Specifically it includes
setting relvant flags of mkey context mask in UMR control segment, and
relaxed ordering write and read flags in UMR mkey context segment.
Link: https://lore.kernel.org/r/20200716105248.1423452-4-leon@kernel.org
Signed-off-by: Meir Lichtinger <meirl@mellanox.com>
Reviewed-by: Michael Guralnik <michaelgur@mellanox.com>
Signed-off-by: Leon Romanovsky <leonro@mellanox.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/linux/mlx5/device.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/include/linux/mlx5/device.h b/include/linux/mlx5/device.h index d184b579617f..4d3376e20f5e 100644 --- a/include/linux/mlx5/device.h +++ b/include/linux/mlx5/device.h @@ -276,7 +276,9 @@ enum { MLX5_MKEY_MASK_RW = 1ull << 20, MLX5_MKEY_MASK_A = 1ull << 21, MLX5_MKEY_MASK_SMALL_FENCE = 1ull << 23, - MLX5_MKEY_MASK_FREE = 1ull << 29, + MLX5_MKEY_MASK_RELAXED_ORDERING_WRITE = 1ull << 25, + MLX5_MKEY_MASK_FREE = 1ull << 29, + MLX5_MKEY_MASK_RELAXED_ORDERING_READ = 1ull << 47, }; enum { |