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| author | Arnd Bergmann <arnd@arndb.de> | 2023-04-14 14:55:48 +0200 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2023-04-14 14:55:48 +0200 |
| commit | aebe916f9e79f3d754da2a7d9e2720d18bbff72b (patch) | |
| tree | efcf7d9937880d9bc369e07f39eee1ce6b358cfb /include | |
| parent | 3ac02aa53d602154620de33bac87f4922e85b828 (diff) | |
| parent | f6ff91a47ac57cb1118d94020302617b6b22c0d1 (diff) | |
| download | linux-stable-aebe916f9e79f3d754da2a7d9e2720d18bbff72b.tar.gz linux-stable-aebe916f9e79f3d754da2a7d9e2720d18bbff72b.tar.bz2 linux-stable-aebe916f9e79f3d754da2a7d9e2720d18bbff72b.zip | |
Merge tag 'qcom-drivers-for-6.4-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers
A few more Qualcomm driver updates for v6.4
This introduces a new binding and a dedicated driver for the Qualcomm
Inline-Crypto-Engine (ICE), in order to support a single shared instance
between SDHCI and UFS, found in recent platforms.
RSC version check is updated to support minor revisions of v3 of the ip
block, the SMD-RPM interface is transitioned to GFP_ATOMIC to avoid the
shrinker to kick in underneath the GPU and QCM2290 support is added to
the SCM binding.
* tag 'qcom-drivers-for-6.4-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
dt-bindings: crypto: Add Qualcomm Inline Crypto Engine
soc: qcom: Make the Qualcomm UFS/SDCC ICE a dedicated driver
dt-bindings: firmware: document Qualcomm QCM2290 SCM
soc: qcom: rpmh-rsc: Support RSC v3 minor versions
soc: qcom: smd-rpm: Use GFP_ATOMIC in write path
Link: https://lore.kernel.org/r/20230414024302.2411985-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'include')
| -rw-r--r-- | include/soc/qcom/ice.h | 37 |
1 files changed, 37 insertions, 0 deletions
diff --git a/include/soc/qcom/ice.h b/include/soc/qcom/ice.h new file mode 100644 index 000000000000..5870a94599a2 --- /dev/null +++ b/include/soc/qcom/ice.h @@ -0,0 +1,37 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2023, Linaro Limited + */ + +#ifndef __QCOM_ICE_H__ +#define __QCOM_ICE_H__ + +#include <linux/types.h> + +struct qcom_ice; + +enum qcom_ice_crypto_key_size { + QCOM_ICE_CRYPTO_KEY_SIZE_INVALID = 0x0, + QCOM_ICE_CRYPTO_KEY_SIZE_128 = 0x1, + QCOM_ICE_CRYPTO_KEY_SIZE_192 = 0x2, + QCOM_ICE_CRYPTO_KEY_SIZE_256 = 0x3, + QCOM_ICE_CRYPTO_KEY_SIZE_512 = 0x4, +}; + +enum qcom_ice_crypto_alg { + QCOM_ICE_CRYPTO_ALG_AES_XTS = 0x0, + QCOM_ICE_CRYPTO_ALG_BITLOCKER_AES_CBC = 0x1, + QCOM_ICE_CRYPTO_ALG_AES_ECB = 0x2, + QCOM_ICE_CRYPTO_ALG_ESSIV_AES_CBC = 0x3, +}; + +int qcom_ice_enable(struct qcom_ice *ice); +int qcom_ice_resume(struct qcom_ice *ice); +int qcom_ice_suspend(struct qcom_ice *ice); +int qcom_ice_program_key(struct qcom_ice *ice, + u8 algorithm_id, u8 key_size, + const u8 crypto_key[], u8 data_unit_size, + int slot); +int qcom_ice_evict_key(struct qcom_ice *ice, int slot); +struct qcom_ice *of_qcom_ice_get(struct device *dev); +#endif /* __QCOM_ICE_H__ */ |