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author | Thomas Gleixner <tglx@linutronix.de> | 2020-12-06 22:46:20 +0100 |
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committer | Thomas Gleixner <tglx@linutronix.de> | 2020-12-11 10:40:53 +0100 |
commit | 69eca258c85000564577642ba28335eb4e1df8f0 (patch) | |
tree | a57999e58a0261d0e89570cc0207ead911b7e9e5 /init | |
parent | 33e62e832384c8cb523044e0e9d99d7133f98e93 (diff) | |
download | linux-stable-69eca258c85000564577642ba28335eb4e1df8f0.tar.gz linux-stable-69eca258c85000564577642ba28335eb4e1df8f0.tar.bz2 linux-stable-69eca258c85000564577642ba28335eb4e1df8f0.zip |
ntp: Make the RTC sync offset less obscure
The current RTC set_offset_nsec value is not really intuitive to
understand.
tsched twrite(t2.tv_sec - 1) t2 (seconds increment)
The offset is calculated from twrite based on the assumption that t2 -
twrite == 1s. That means for the MC146818 RTC the offset needs to be
negative so that the write happens 500ms before t2.
It's easier to understand when the whole calculation is based on t2. That
avoids negative offsets and the meaning is obvious:
t2 - twrite: The time defined by the chip when seconds increment
after the write.
twrite - tsched: The time for the transport to the point where the chip
is updated.
==> set_offset_nsec = t2 - tsched
ttransport = twrite - tsched
tRTCinc = t2 - twrite
==> set_offset_nsec = ttransport + tRTCinc
tRTCinc is a chip property and can be obtained from the data sheet.
ttransport depends on how the RTC is connected. It is close to 0 for
directly accessible RTCs. For RTCs behind a slow bus, e.g. i2c, it's the
time required to send the update over the bus. This can be estimated or
even calibrated, but that's a different problem.
Adjust the implementation and update comments accordingly.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/20201206220542.263204937@linutronix.de
Diffstat (limited to 'init')
0 files changed, 0 insertions, 0 deletions