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authorJacob Keller <jacob.e.keller@intel.com>2021-06-09 09:39:47 -0700
committerTony Nguyen <anthony.l.nguyen@intel.com>2021-06-11 07:38:00 -0700
commit9733cc94c52320a13bf0357d4937e7c9ed759ac9 (patch)
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parent8f5ee3c477a8e416e30ec75caed53a80fdca3462 (diff)
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ice: process 1588 PTP capabilities during initialization
The device firmware reports PTP clock capabilities to each PF during initialization. This includes various information for both the overall device and the individual function, including For functions: * whether this function has timesync enabled * whether this function owns one of the 2 possible clock timers, and which one * which timer the function is associated with * the clock frequency, if the device supports multiple clock frequencies * The GPIO pin association for the timer owned by this PF, if any For the device: * Which PF owns timer 0, if any * Which PF owns timer 1, if any * whether timer 0 is enabled * whether timer 1 is enabled Extract the bits from the capabilities information reported by firmware and store them in the device and function capability structures.o This information will be used in a future change to have the function driver enable PTP hardware clock support. Signed-off-by: Jacob Keller <jacob.e.keller@intel.com> Tested-by: Tony Brelinski <tonyx.brelinski@intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
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